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ISO1540: Iso1540

Part Number: ISO1540

design: side2 cpu side, 3.3v, side 1 isolated psu control ic i2c interface, 3.3v -2

issue: no ack from slave of side 2, waveform seems good.

If add a 100pf to Gnd at data input at side2, the interface works good.

Or If add a 1nf  to 3.3 v at data input at side2, the interface works good.

But I can not under the root cause, could you help.

  • Hi there,

    Would you be able to provide a schematic of your system? Are there any other decoupling capacitors on Vcc side 1 or 2 besides the 1nF that you added?

    Respectfully,

    Lucas Schulte

  • 1. if replace with another ISO1540, the i2c works ok;

    2. rework as below:

    R90008, R90009 installed 1.5K
    R90005 installed 4.7k

    1) if R90006 install a 1nF cap for SDA2, i2c works ok;
    2) or if add a 100pF to gnd for SDA2, i2c works ok;

    ISO1540.pdf

  • Thank you for including a schematic. It appears that the 10k pullup resistors were too high of value for your application. Reducing this value to 1.5k seems like it worked for you. 

  • no, chang 10k to 1.5k still cannot solve the issue.

    why still need to add a 1nF cap to vcc or 100pf to gnd at side 2 for data would make interface working? this would cause data rising slow.

  • Hi,

    Apologies for the delay in our response.

    Thanks for sharing all the inputs so far and sorry to hear about this issue. I am not quite sure why does the issue get resolved when a 1nF cap to VDD2 or a 100pF cap to GND2 is added. I would probably need more information to understand your application the situation better.

    Could you please confirm that R90005 & R90006 pull-up resistors are always present? I see them marked as DNI in the schematic and hence the question. Without these pull-up resistors the communication is not expected to work reliably.

    Whenever we hear any communication fail issue on ISO1540 from other customers, it is usually due to the mismatch in logic levels between ISO1540 Side1 I/Os and the connected slave PSU monitor IC. Please do share us the VIL, VIH & VOL thresholds of I2C pins on slave PSU monitor IC that is connected to ISO1540 Side1. I want to make sure if these logic levels are compatible to ISO1540 Side1 specs. Thanks.

    Regards,
    Koteshwar Rao

  • Could you please confirm that R90005 & R90006 pull-up resistors are always present? I see them marked as DNI in the schematic and hence the question. Without these pull-up resistors the communication is not expected to work reliably.
    =》The original design  R203051 & R203054 are always present  for pull-up resistors which act as the same function as  R90005 & R90006.
    The final rework solution would solve the problem as below. And the 1nF cap present at R90006 is critical for working successfully. But I still can't understand the reasons.
    R90005 installed 4.7k for SCL, R90006 install a 1nF cap for SDA2; And R90008, R90009 installed 1.5K.

    PSU monitor IC  ADM1075 I2C  logic levels as attached picture. I double checked the interface logic levels. It seems have no improvement even lower the output voltage from about 750mV to 700mv or 650mV.

  • ,

    To confirm, replacing the ISO1540 with another ISO1540 works? 

    Can we see the I2C waveforms when the I2C is not working? I need the waveforms from SDA and SCL of both sides please. 

    Respectfully,

    Lucas

  • Hi,

    Thanks for your inputs.

    I see that ADM1075 I2C logic input and output thresholds are compatible with ISO1540 Side1 logic thresholds except that VIL(max) of ADM1075 is 0.8V while ISO1540 VOL1(max) is 0.8V, hence there is no margin. I am not sure if this is causing any issue.

    Regarding R90006, when you use 1nF cap do you replace the 4.7kΩ resistor with the 1nF cap or do you keep both the resistor and cap?
    It seems to me that there is some other issue on the PCB, could you please share the PCB layout for us to review? ISO1540 has been in product for many years and we have not heard from any customers reporting functionality issue when the pull-up resistors are used and the device is connected to a compatible device.

    Regards,
    Koteshwar Rao

  • To confirm, replacing the ISO1540 with another ISO1540 works? 

    => Yes.

    wavefore when not working as attachment.

  • Regarding R90006, when you use 1nF cap do you replace the 4.7kΩ resistor with the 1nF cap or do you keep both the resistor and cap?

    =>Regarding R90006, only solder a 1nF cap at R90006 location.

    It seems to me that there is some other issue on the PCB, could you please share the PCB layout for us to review.

    => attach the pcb as attachment. From the tested signals, there is no worse noise in signals. pwb.pdf

  • Hi,

    Thank you for sharing the waveform and the PCB layout, this is helpful.

    Regarding the waveform, could you please mention what channels in each waveform are monitored at what point in the schematic? Please also mention under what test conditions are these waveform captured. With this information, we will be able to interpret the waveform better.

    I have reviewed the PCB layout and I believe I was able to understand component placement and routing. The one very major concern I have in the PCB layout is that the decoupling capacitors C90003 & C90004 are placed very far from device VCC/GND pins. These should be placed as close as possible to VCC/GND pins as also described in the datasheet.

    I do understand that VCC & GND pins are not the neighboring pins on device making it hard to keep the decoupling caps close to both the pins. In this case, we recommend placing the decap at VCC pin and connecting the other end of cap to GND plane through via. I also see that the pull-up resistors of I/O pins are connected to device VCC pin even before the decap connects to VCC. This is not very good for device operation. The decaps provide the necessary transient currents to device enabling it to operate normal, if the caps are placed farther then the device feels like choking and might stop working momentarily. This will lead to unstable device operation. The decap placement rule is true for most isolators and is not limited to ISO1540 alone.

    This also explains, why adding a cap at I/O pins is making device to work. The device is getting its transient current through these I/O caps indirectly. This operation is not guaranteed all the time, hence it is best to modify the PCB layout to accommodate decaps close to device VCC pin. After this change, we expect everything to work fine.

    Let me know if you have any questions, thank you.

    Regards,
    Koteshwar Rao