I'm looking for a concept for analog value isolation.
I have an idea which is to use SN6501+Transformer.
The transformer could be 760390012 (1:1.1). The VCC of SN6501 is the analog voltage to be sampled, the VCC voltage range could be 4...5V (Maybe I can change to 4.5...4.9V). (Circuit pls see below)
My question is:
What will be some affection to the chip when VCC=4...4.5V of SN6501 (When it's out of VCC required range)?
Is the output voltage (V_ADC) 1.1*VCC all the time? (Linear from Input to Output)
Thanks a lot in advance!