Part Number: ISO7760
Regarding "Device Functional Modes", there is "Undetermined" condition on OUTPUT as below.
Does it mean floating?
In this case, Can the output logic state be decided by pull-up/down resistor?
For the case when VCCO = PD, the outputs are mostly going to be floating. But if VCCO = 1.7V to 2.25V, then the outputs may have some intermediate voltage as the device is not fully powered. Having a pull-up/down resistor might not help, since this is below device UVLO voltage, it is best to not refer to the output during such VCCO voltages.
In most cases, the MCU and VCCO of ISO device share the same power supply and hence, for voltages < 2.25V I believe the MCU might not be ON to read the output from isolator. Thanks.
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In reply to Koteshwar Rao:
Thank you for your help.
Does "some intermediate voltage" mean the voltage other than High and Low(e.g. VDD/2)?
In reply to Kuramochi Tadahiko:
Yes, I meant voltages other than a strong HIGH or LOW. Since at these voltages (<2.25V) the outputs are not strongly driven, it is possible to see some intermediate voltages. Thanks.
I have an additional question.
When VCCO = 1.7V to 2.25V without a PU/PD resistor, is there any possibility that the logic invert against input?
When VCCO = 1.7V to 2.25V, the output will be weakly driven and hence the output voltage will be much lower than VCCO. Since VCCO itself is low enough voltage, we expect the output to have either close to 0V or have about less than half of VCCO voltage. Since this voltage is still very low, it might not be registered as HIGH.
Please also note that, the device has UVLO+ and UVLO- voltage thresholds between 1.7V to 2.25V and hence, the device is either going to be fully turned ON or stay turned OFF. When it is fully turned ON, the device output will always follow the input. If the device is in turned OFF condition then the explanation in my previous paragraph applies.
I hope this further helps you understand the device better, thanks.
Thank you for your support.
OUT does not go high when IN=L with PD resistor, right?
Like I mentioned in my previous post, the output doesn't follow input when device is powered down. But the output can be in an intermediate voltage and it cannot be treated as HIGH. Hence, you can say that OUT doesn't go to HIGH irrespective of the input voltage under powered down condition.
The pull-down resistor at OUT pin might not have a major impact, but having it is generally useful. Thanks.
Thank you for your kind support and sorry for troubling you.
My customer concerns about a malfunction that OUT goes high when IN=L whenever.
It doesn't occur surely if VCCO is not PD condition, right?
I understand that customer is concerned.You are right, if VCCO is not in powered down condition then the output will always follow the input if input is also powered up. If input is not powered up then output will go to default state. This has been described in the Function Table of datasheet, that should give assurance to customer. Thanks.
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