This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • Resolved

TPS62420-Q1 : Output voltage accuracy vs DEF_1 pin input bias current

Prodigy 30 points

Replies: 3

Views: 967

Hi,

we are designing a step down supply from 5V to 3.3V (converter 1) and to 1.2V (converter 2) using the TPS62420-Q1. The schematic is as follows :

The question we have is : we noticed the input current of pin DEF_1 is spec'ed to maximum 1µA. Combining this maximum input current to the resistors shown above (which are within the specified range suggested by the datasheet) gives us a tolerance on the output voltage of 10.2% for the 3.3V and 16.9% for the 1.2V. This is completely inacceptable for our design.

Now, we could lower the values of resistors R327, R329, R331 and R333 by say a factor of 100 and this would give us an acceptable output voltage accuracy, but this wouldn't make sense with typical values shown in the datasheet (and I'm worrying if it could affect stability and/or transient performance, as none of this is documented in the datasheet).

In comparison, using the LM43602-Q1 (which has a maximum FB leakage current of 65nA and typical resistor values of 10k to 100k), we can easily end up with tolerances of 0.1% to 0.2%...

Does this make any sense? Is the maximum input current of DEF_1 really 1µA or is it just a "convenient" value that was placed in the datasheet? Is there any way to be sure that the regulator will have adequate stability and accuracy?

Regards,

Marion Nourry

  • Hi,

    Datasheet specification for input current of DEF_1 is for the maximum input current it will draw from this pin. Internally this pin goes to error amplifier input and it is high impedance. This does not mean that you have to keep the input current to this pin to less than 1uA with large external feedback resistor. Internally it is anyway limited.

    Yes. you can use smaller resistor if it works for you. Datasheet example is given considering the maximum efficiency. Both the regulators need feed forward capacitors (BUCK1 has internal FF cap) and depending on your external feedback resistor you may have to tweak the FF cap on BUCK2. So, i would advise you to measure the stability on your board to be sure that you have no issues with the stability. For the approximate estimation, you can use the PSPICE average model under the below link for loop stability simulations.

    http://www.ti.com/product/TPS62420-Q1/toolssoftware

    Regards,

    Murthy

    Find the right power solution for your processor or FPGA. Visit www.ti.com/SoCPower today!

  • In reply to Krishnamurthy Hegde:

    Hi Murthy,

    thanks for the quick reply. Just to make sure we understand each other, I am not trying to "keep the input current to this pin to less than 1uA with large external feedback resistor", I'm using values of external feedback resistors that are within the suggested range in the datasheet (and I assume stability is not an issue when using resistor values in that range).

    I guess we'll have to give it a try on 100 times lower resistor values. But permit me to insist, it doesn't seem coherent from my point of view that a circuit using the TPS62420 with components that are nearly identical as the suggested circuit in the datasheet would allow a 15% error on the output voltage... Are you sure the 1µA max input current is not an erroneous value?

    Regards,

    Marion Nourry

  • In reply to Marion Nourry:

    Hi Marion,

    I think i got what you are saying. Are you considering this 0.01uA typ and 1uA as a current source and calculating your feedback voltage variation? In this case, it is not good to do that way. In reality, input current variation is much lesser. But considering our ATE limitations/accuracy, max 1uA is specified in the datasheet. For regulation accuracy parameter, please look at the datasheet parameter table Output section and you can consider regulation accuracy as +/-1% in PWM mode and consider your external resistor accuracy on top of this. This should cover any variation due to input bias current.

    Hope this helps you.

    Regards,

    Murthy

    Find the right power solution for your processor or FPGA. Visit www.ti.com/SoCPower today!

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.