This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

The impedance of CLP pin of TPIC74100-Q1

Other Parts Discussed in Thread: TPIC74100-Q1

I would like to confirm the impedance of CLP pin for TPIC74100-Q1.

How much is the impedance?

Or is there pull down resistance or pull up resistance  in the IC?

The customer want to know it for connecting MCU to CLP pin.

Best regards,

Atsushi Yamauchi

  • Yamauchi-san,

    The appropriate applications engineer has been notified of your post and will respond accordingly.

    Eric Hackett
  • Yamauchi-san,
    I have asked design team to look in to this and as soon as i have the information, i will let you know.
    But my guess is that there is no internal pull down or pull up at this pin and signal may be directly going to gate of MOS transistor and typically it will be in Mega ohm's range. For customer, they just need to make sure that they fullfiill the reuqirement of VIL and VIH for this pin and leakage should be negligible.
    But i will confirm to you. Regards,Murthy
  • Dear Nurthy-san,

    Thank you for your reply.

    I have posted "TPIC74100-Q1 waveform of CLP pin" for same customer and other product.

    I think they want to know the pull down resister value (or not need it).

    In the case, they need the capacitor. Usually, are they need the pull down resister and bypass capacitor?

    If you can not answer the impedance, it is OK that I know these parts.

    Best regards,

    Atsushi Yamauchi

  • Yamauchi-san,
    Design team confirmed me that my above assumption is correct and this pin will have few Mega ohm input impedence and there is no internal pulldown or pull up inside the device.
  • Hello Yamauchi-san,

    CLP pin has an internal current source (I assume that it has few nano ampere) connected to it. The observed current seen coming out of CLP is a start up transient when the internal voltages of 74100 are not stable yet. As observed, CLP voltage can go up to 5V which is the Vlogic voltage (through the current source).

    If CLP is driven by a digital output from the uC (and not an open drain output), then the 33K is fine. The 1nF and the 33K form a low pass filter that smoothens the spike.

    You can use pul down of 33K ohm and 1nF capacitor at this pin.