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UC2825a-ep synchronization

Dennis Cascio
Prodigy 90 points
Other Parts Discussed in Thread: UC2825A-EP

If a UC2825a-ep is set up to free-run at 80kHz with a maximum duty cycle of 91% but is fed an external synchronization signal to run at 120kHz, will there still be duty cycle limitation on it when running synchronized at 120kHz?  If so, what will it be?

  • 0
    TI__Mastermind 31580 points
    Hi Dennis,

    Your post should be on the Hi-rel forum, I will move it and one of colleagues will answer it.

    Regards

    Peter
  • 0 in reply to Peter Meaney
    TI__Expert 7445 points

    Denis,

        In order to determine max duty cycle.

    1.  max of (min off-time)   or  another way to took at would be the oscillator discharge time..

    Datasheet specifies max duty cycle of  85% for the test conditions highlighted i.e. for specific RT and CT values as indicated on Electrical Characteristics.

    Oscillator discharge current is also specified with its min and max values on pg. 5 of datasheet.

    Pg. 7 of datasheet highlights oscillator circuit with Fig. 2 and Fig 3  of Max duty cycle.

    What is the application where this controller is being used?

    Thus once you know the min off time then at minimum switching frequency  it will determine what the max duty cycle will be. 

  • 0 in reply to Ramesh Khanna
    Prodigy 90 points
    Ramesh,

    Thank you for the response. I was wondering if you could clarify the following two items:
    1. Assuming non-synchronized operation, the data sheet provides the following equation: RT = 3V / [(10mA)*(1-Dmax)]
    Therefore, Dmax should be = 1 - [ 3V / (10mA*RT) ]
    Using RT specified in the data sheet at 3.65k, and varying Vpk from 2.6V to 3V and oscillator discharge current from 9mA to 11mA as specified in the data sheet, I get a range for maximum duty cycle of 90.9% to 93.5% (nominal of 92.3%) . So I'm not clear where the 85% comes from. Something else must factor into this that I'm not considering yet.
    The nominal 92.3% seems like it matches what you get from Figure 3 at 3.65k.
    Also, since the data sheet specifies the nominal peak ramp voltage as 2.8V, shouldn't the equation for Rt use 2.8V instead of 3V.

    2. If we externally synchronize the frequency to around 120 kHz using a method similar to that shown in the TI technical paper: "A New Synchronization Circuit for Power Converters" by John Bottrill, how is the duty cycle range affected in this case. Or perhaps my question is: what controls it in this case. Note our free-running frequency is around 100kHz, not 80kHz as I stated in my original post.

    Thanks for your help!