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SM320F2812: Supply Voltage leeway

Bob Bacon
Genius 10815 points
Part Number: SM320F2812

Hello
Could you please help answer the following question from one of my customers

‘We currently use Digital Signal Processor part SM320F2812PGF-EP in one of our applications. The core and I/O supplies are powered from tight tolerance linear voltage regulators providing 1.9V and 3.3V respectively. These regulators have voltage supervisors that would assert the DSP reset line if the voltages fall outside a defined region, for example if one of the regulators fails to regulate. We power the core at 1.9V to allow operation at 150MHz.

 

Under worst case tolerances the reset line would be asserted when the supply voltage is already outside the specified operating conditions in the DSP datasheet:

 

DSP datasheet I/O supply voltage range: 3.14V to 3.47V

DSP datasheet Core supply voltage range: 1.81 to 2.0V

 

Worst case assertion of the reset line by the 3.3V voltage supervisor: low end 2.998V; high end 3.655V

Worst case assertion of the reset line by the 1.9V voltage supervisor: low end 1.74V; high end 2.11V

 Specifically we would like to know if the DSP would degrade its operation or completely misbehave if it were powered at the extreme voltages quoted above. Our testing at these voltages indicates no impact at all but obviously we cannot see what happens inside the processor.’

 

I think the main point is how much leeway is given beyond the recommended operating conditions. The figures above of course a worst case conditions if something went wrong. How are the recommended limits worked out?

Regards
Bob Bacon

  • 0
    TI__Guru 62930 points
    Bob,
    unfortunately, there is no quantified extra margin in this limits. They are essentially the line in the sand that validates performance at those specific conditions.
    Some units will have more margin, while others less based on the process variation.
    One possibility to give you more margin, would be to limit frequency to 135Mhz. At 135Mhz, device will still operate to the upper limit of the 150Mhz conditions. Effectively allowing the core voltage to operate from 1.71 to 2V. This does not completely eliminate your potential violation of specification.
    Limiting the temperature range will also improve the unquantified margins.

    If this answers your question, please click "Verify it as the answer"
    Regards,
    Wade
  • 0 in reply to Wade Vonbergen
    TI__Genius 10815 points
    Hi Wade
    Thanks for your response, I suspected this would be the reply but worth confirming.

    If there is some generic statistical data on how power supply limits are reached ?
    Is there any documentation on how limiting temperature would improve the margins ?
    Regards
    Bob Bacon
  • 0 in reply to Bob Bacon
    TI__Guru 62930 points
    Bob,
    I do not have any data on how the supply limits were derived for this device for the 2 speed grades. Most likely, it was derived from design simulations and process corners and fine tuned with yield analysis with initial silicon.
    With respect to temperature. I do not have anything quantitative for what margins would be created by relaxing temperature range.
    Regards,
    Wade