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TPS7H3301-SP: VDD/VIN Recommendations

Part Number: TPS7H3301-SP

Hi - we are planning on using this device for a DDR2 memory interface for a space application and have a couple of questions. 


We can power the VDD/VIN input with +2.5V or +3.3V.

In the case of the +2.5V for VDD/VIN, is it ok to use +3.3V LCMOS level signal for EN? 

For the +2.5V VDD/VIN use case, we can sequence the supplies in any order (VDD/VIN vs VLDOIN, etc). 

If we use +3.3V for VDD/VIN, we cannot shut off the +3.3V supply. Are there any issues with having VDD/VIN supplied by +3.3V for long periods of time with no voltage present on VLDOIN, VDDQSNS, etc ??

Thanks
John R

  • Hi John,

    I will confirm with design in case there is any issue with regards to sequencing and provide you feedback on it.
  • Hi John,

    Test the device in lab with the various sequences that you have highlighted. There is no issue or concern.

    In the case of the +2.5V for VDD/VIN, is it ok to use +3.3V LCMOS level signal for EN?
    (RK) Yes no issue observed.( 3.3V LCMOS logic level high = 2.4V)

    For the +2.5V VDD/VIN use case, we can sequence the supplies in any order (VDD/VIN vs VLDOIN, etc).
    (RK) Yes - no issue

    If we use +3.3V for VDD/VIN, we cannot shut off the +3.3V supply. Are there any issues with having VDD/VIN supplied by +3.3V for long periods of time with no voltage present on VLDOIN, VDDQSNS, etc ??
    (RK) no issue.