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SN54LS368A: Single ended to Diff ended

Part Number: SN54LS368A
Other Parts Discussed in Thread: LMH6554

Hi Support,

I was looking for a add on circuit for our existing TI Quad line receiver DS26C32ATM.  The customer is asking for a dual input option which would convert our present Differential ended(DE) to Single ended (SE).

I found a LMH6554 device from TI and then I hit on this SN54LS368A tristate driver.   The tristate seems to make sense since I can utilize the isolation feature on shared lines.  Please see attached image or below.  I have a problem with the need for 2 independent lines on driver 4 and 5.  I may need another whole IC for 1 driver.  Not sure what direction to take.

Please Help!!  Thanks Frank

  • Frank,
    Thanks for the question. However, I am having difficulty understanding what you are trying to accomplish.
    What does S1, S2, E0, E1, E2, represent?
    Are there distances involved with the differential signals?
    I am guessing that the receiver is being used a 2 input comparator?
    It seems as though you are trying to implement a logic function with the inputs S1, S2 utilizing the receiver. If so, a truth table may be of value.

    Regards,
    Wade
  • Hi Wade,

    Here are the replies:  (If you want to talk please call me 973 492 1207 x32)

    Thanks for the question. However, I am having difficulty understanding what you are trying to accomplish.
    1)
      What does S1, S2, E0, E1, E2, represent?

    When E1 = 0vdc E2 = 5vdc.(this is state 1 "S1")  

    When E1= 5vdc  E2=0vdc. .(this is state 2 "S2")  

    E0 = 0/5vdc and controls the selection of mode it will be operating in DE/SE (Diff ended/Single ended).


    2)  Are there distances involved with the differential signals?

    No this is done in a ~3 to 5 " length on a pcb.


    3)  I am guessing that the receiver is being used a 2 input comparator?

    Yes it has a E2 and E1 inputs 0/5VDC. 

    When E1 = 0vdc E2 = 5vdc.(this is state 1 "S1")  

    When E1= 5vdc  E2=0vdc. .(this is state 2 "S2")  


    4)  It seems as though you are trying to implement a logic function with the inputs S1, S2 utilizing the receiver. If so, a truth table may be of value.

    Here is the clearer schematic.  The logic is shown

    Note I tried to paste the scanned pdf file or from snipping tool screen capture and cannot get image on this reply.  Please if you would send an email so I can forward. 

    Thanks Frank