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Replies: 9
Views: 3448
Hello All,
I am using DRA7xx-EVM HW .
processors.wiki.ti.com/.../DRA7xx_GLSDK_Software_Developers_Guide
I was trying to configure I2C2 pins on my target to run VIP application demos and it fails every-time.
root@dra7xx-evm:~# devmem2 0x4847C010 w 0x4/dev/mem opened.Memory mapped at address 0xb6f38[ 55.742431] Unhandled fault: imprecise external abort (0x1406) at 0x00000000000.Bus error
Can anyone help to resolve this ?
Thanks,
Kanagarajan
Hello Kanagarajan,
It seems that your I2C2 module is not enabled.
Check the following registers and apply the proposed settings.
L4PER power state0x4AE0 7400 - PM_L4PER_PWRSTCTRL[1:0] POWERSTATE - 0x3: ON State
0x4A00 9700 - CM_L4PER_CLKSTCTRL[1:0] CLKTRCTRL - 0x2: SW_WKUP Controls the clock state transition of the L4PER clock domain.
0x4A00 97A8 - CM_L4PER_I2C2_CLKCTRL[1:0] MODULEMODE - 0x2 Module is explicitly enabled.
After PRCM configuration for I2C2 module please check I2C2 Pad configuration in Control Module:
CTRL_CORE_PAD_I2C2_SDA - 0x4A00 3808CTRL_CORE_PAD_I2C2_SCL - 0x4A00 380C
After this global configurations settings, you should write in I2C2 registers - I2C_SYSC
Best regards,
Yanko
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In reply to Yanko Todorov-XID:
Hello Yanko,
After checking the ctrl pad register ,what would be settings for the I2C_SYSC register of I2C2 module ?
In reply to K_Raj:
If you read 0x4A00 97A8 - CM_L4PER_I2C2_CLKCTRL register value 0x30002.
17:16 - 0x3: Module is disabled and cannot be accessed
1:0 MODULEMODE - 0x2: Module is explicitly enabled.With this value you cannot access I2C2 module.To access I2C2 module please set - CM_L4PER_CLKSTCTRL[1:0] CLKTRCTRL - 0x2: SW_WKUP
However, you are unable to write in 0x4847C010, because this register belong to McASP8 module. This address corresponds to MCASP_PFUNC register. Best regards,
I see that you use GLSDK SW release. See my steps for enabling I2C2 module by using omapconf tool:
root@dra7xx-evm:~# omapconf read 0x4A0097A8
00030000
root@dra7xx-evm:~# omapconf set bit 0x4A0097A8 1
@0x4A0097A8: 0x00030000 ==> 0x00030002
root@dra7xx-evm:~# omapconf read 0x4AE07400
000F0105
root@dra7xx-evm:~# omapconf set bit 0x4AE07400 1
@0x4AE07400: 0x000F0105 ==> 0x000F0107
root@dra7xx-evm:~# omapconf read 0x4A009700
01229103
root@dra7xx-evm:~# omapconf clear bit 0x4A009700 0
@0x4A009700: 0x01229103 ==> 0x01229102
00000002
After this configuration I can access I2C2 module's registers:
root@dra7xx-evm:~# omapconf read 0x48072000 - I2C_REVNB_LO 0000080C
root@dra7xx-evm:~# omapconf read 0x48072004 - I2C_REVNB_HI 00005040
Bits 16:17 cannot be set. Those bits are read only.
Could you explain what modifications are applied in your kernel?
In my kernel modifications , just tried to read the register values from kernel using readl function using the memory address of 0x4A0097A8 and it crashes due to invalid memory mapping.
I2C1 module is enabled during the kernel startup itself could find in the log below and why it fails to do the same for I2C2 ?
root@dra7xx-evm:~# omapconf dump 0x4A0097A0 0x4A0097A8|----------------------------|| Address (hex) | Data (hex) ||----------------------------|| 0x4A0097A0 | 0x00020002 | // I2C1 | 0x4A0097A4 | 0x00000000 || 0x4A0097A8 | 0x00030000 | // I2C2 |----------------------------|
I tried your configuration on my target , please find the log :
omapconf: powerdm_deinit(): cpu not supported!!!
omapconf: clockdm_deinit(): cpu not supported!!!
000F0107
root@dra7xx-evm:~#
@0x4AE07400: 0x000F0107 ==> 0x000F0107
01209103
@0x4A009700: 0x01209103 ==> 0x01209102
00020002
root@dra7xx-evm:~# omapconf read 0x48072000
0000080C
root@dra7xx-evm:~# omapconf read 0x48072004
00005040
May I know how these changes can be done in the kernel build to enable I2C2 ?
I am testing VIP/VPE applications on GLSDK 6.04 release.
But I don't understand the beahviour in my target , could you explain if I2C2 module is not enabled , then how could the LVDS cameras works in my target when running vip applications dmabuftest & v4l2capturedisplay, eventhough all cameras doesn't probe successfully it manages to register video driver for atleast 1 or 2 cameras in random.In the Dra7xx developers guide it has mentioned that it should be able to probe i2c2 slave for all the LVDS cameras connected.
During the kernel startup some of the i2c config messages , are these for i2c-1 ?
[ 2.492279] i2c /dev entries driver[ 2.498504] i2c 1-0031: Writing addr = 14, data = f4[ 2.503936] i2c 1-0031: Writing addr = 15, data = f6[ 2.509368] i2c 1-0031: Writing addr = 16, data = f8[ 2.514770] i2c 1-0031: Writing addr = 17, data = fa[ 2.520141] i2c 1-0031: Writing addr = 18, data = fc[ 2.525543] i2c 1-0031: Writing addr = 19, data = fe[ 2.531921] i2c_expander 1-0027: Writing addr = 0, data = 0[ 2.537963] i2c_expander 1-0027: Writing addr = c, data = 0[ 2.543975] i2c_expander 1-0027: Writing addr = 12, data = 63[ 2.550201] i2c_expander 1-0027: Writing addr = 12, data = e3[ 2.556427] i2c_expander 1-0027: Writing addr = 1, data = 0[ 2.562469] i2c_expander 1-0027: Writing addr = d, data = 0[ 2.568511] i2c_expander 1-0027: Writing addr = 13, data = 63[ 2.574707] i2c_expander 1-0027: Writing addr = 13, data = e3[ 2.581939] i2c_expander 1-0027: i2c expander initialized[ 2.587738] i2c 1-0031: Writing addr = 14, data = f4[ 2.593109] i2c 1-0031: Writing addr = 15, data = f6[ 2.598480] i2c 1-0031: Writing addr = 16, data = f8[ 2.603881] i2c 1-0031: Writing addr = 17, data = fa[ 2.609283] i2c 1-0031: Writing addr = 18, data = fc[ 2.614654] i2c 1-0031: Writing addr = 19, data = fe[ 2.621063] i2c_expander 1-0021: Writing addr = 0, data = 0[ 2.627105] i2c_expander 1-0021: Writing addr = c, data = 0[ 2.633148] i2c_expander 1-0021: Writing addr = 12, data = 63[ 2.639373] i2c_expander 1-0021: Writing addr = 12, data = e3[ 2.645568] i2c_expander 1-0021: Writing addr = 1, data = 0[ 2.651611] i2c_expander 1-0021: Writing addr = d, data = 0[ 2.657653] i2c_expander 1-0021: Writing addr = 13, data = 63[ 2.663879] i2c_expander 1-0021: Writing addr = 13, data = e3[ 2.671051] i2c_expander 1-0021: i2c expander initialized[ 2.676849] i2c 1-0031: Writing addr = 14, data = f4[ 2.682250] i2c 1-0031: Writing addr = 15, data = f6[ 2.687652] i2c 1-0031: Writing addr = 16, data = f8[ 2.693023] i2c 1-0031: Writing addr = 17, data = fa[ 2.698425] i2c 1-0031: Writing addr = 18, data = fc[ 2.703826] i2c 1-0031: Writing addr = 19, data = fe[ 2.710205] i2c_expander 1-0025: Writing addr = 0, data = 0[ 2.716247] i2c_expander 1-0025: Writing addr = c, data = 0[ 2.722290] i2c_expander 1-0025: Writing addr = 12, data = 63[ 2.728515] i2c_expander 1-0025: Writing addr = 12, data = e3[ 2.734741] i2c_expander 1-0025: Writing addr = 1, data = 0[ 2.740783] i2c_expander 1-0025: Writing addr = d, data = 0[ 2.746795] i2c_expander 1-0025: Writing addr = 13, data = 63[ 2.753021] i2c_expander 1-0025: Writing addr = 13, data = e3[ 2.760223] i2c_expander 1-0025: i2c expander initialized
I2C2 module in your configuration is 0x2: Module is in Idle mode (only OCP part). It is functional if using separate functional clock.
I2C2 module has: L4PER_L3_GICLK - Interface clock
PER_96M_GFCLK - Functional clock
It seems that L3 GICLK is not enabled in your configuration
/* i2c2 */
static struct omap_hwmod dra7xx_i2c2_hwmod = {
.name = "i2c2",
.class = &dra7xx_i2c_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4PER_I2C2_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4PER_I2C2_CONTEXT_OFFSET,
.modulemode = MODULEMODE_SWCTRL,
},
.dev_attr = &i2c_dev_attr,
};
#Q: I2C1 module is enabled during the kernel startup itself could find in the log below and why it fails to do the same for I2C2 ?
It seems that your problem is caused by conflict between I2C2 module and other module in DRA7xx EVM.
Please run following commands to enable I2C2:
target# devmem2 0x4a003808 w 0x60000 target# devmem2 0x4a00380C w 0x60000 target# devmem2 0x4847C010 w 0x4 target# devmem2 0x4847C014 w 0x0 Best regards,Yanko