I have inherited a project / source code that has a DMA transfer setup to bring frames of data directly into the DSP. All of this code works and runs happily on our hardware.
The only issue with it is, the DSP sits in a polling loop reading the DMA4_CSRi register to see when the FRAME bit (bit3) is set to know when the data is ready for processing. Once the data is ready, the DSP processes it before going back to the polling loop waiting for the next frame of data. I have tasked myself with changing this from a polling loop to an interrupt driven process so that the DSP can be freed up for other tasks between frames of data.
Can someone point me to an example or steps to make this change? One twist that makes it slightly harder is, my development environment is Linux and I do not have access to CCS. I have browsed Brad Griffis' wiki page and a somewhat helpful link to get a big picture. But since the hint assumes CCS is available, it hides many of the details that I expect I would have to implement myself (ie. creating IVT, registering ISR, etc).
Any help would be greatly appreciated. Thanks!