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question about mailbox, how to invoke irq to receiver?

Dear all,

I read omap5 TRM about mailbox.

If maibox1 user0 set interrupt enable as receiver.

How mailbox1 user0 to get the irq?

When does the sender wirte message to mailbox 1 message0 or message 1 or 2 ... 7?

Does any register can set it, if I just want to write message0 or message5 to invoke the interrupt?

Thank you.

  • Hello Descent,

    Which processor you are using, OMAP5 or Keystone ?

  • Hi SenthilKumar Srinivasan ,

    I use OMAP5.

    Do I miss something?
  • Hello Descent,

    Moved this query to OMAP forum.

  • The mailbox module includes the following user subsystems:

    • User 0: MPU subsystem (u = 0)

    • User 1: DSP subsystem (u = 1)

    • User 2: IPU subsystem (u = 2)

    • User 3:

    – For the MAILBOX instance - C2C interface

    – For the MAILBOX_IVA instance - IVA subsystem (ICONT1 or ICONT2)

    Each user has a dedicated interrupt signal from the corresponding mailbox module instance and dedicated interrupt enabling and status registers.

    Each MAILBOX_IRQSTATUS_RAW_u/MAILBOX_IRQSTATUS_CLR_u interrupt status register corresponds to a particular user.

    For the MAILBOX instance, a user can query its interrupt status register through the L4_CFG interconnect.

    See the mailbox diagram:

    Mailbox Users:
    A device needing to communicate with a target processor device should specify them using the common mailbox binding properties, "mboxes" and the optional
    "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value of the mboxes property should contain a phandle to the mailbox controller device node and an args specifier that will be the phandle to the intended sub-mailbox child node to be used for communication. The equivalent "mbox-names" property value can be used to give a name to the communication channel to be used by the client user.

    /* OMAP4 */
    mailbox: mailbox@4a0f4000 {
    	compatible = "ti,omap4-mailbox";
    	reg = <0x4a0f4000 0x200>;
    	interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
    	ti,hwmods = "mailbox";
    	#mbox-cells = <1>;
    	ti,mbox-num-users = <3>;
    	ti,mbox-num-fifos = <8>;
    	mbox_ipu: mbox_ipu {
    		ti,mbox-tx = <0 0 0>;
    		ti,mbox-rx = <1 0 0>;
    	mbox_dsp: mbox_dsp {
    		ti,mbox-tx = <3 0 0>;
    		ti,mbox-rx = <2 0 0>;

    Best regards,