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SN74LVC1G17: Confirmation of thresshold

Part Number: SN74LVC1G17


When reading table 7.5 in data sheet, it shows for V(t+) of 3V supply that minimum is 1.48V and maximum is 1.92V.   I am writing to confirm the device will not transition for positive input until the input is at or above 1.48V and may take all the way to 1.92V before the logical transition takes effect.   Is this understanding correct?  If so then there is no possibility for an noisy input that is always below 1.48V (let us say 0.7V) to create an unintended transition.  Is this understanding correct?  Any further comments?   

Thank you,


  • Hey HSG you're correct in your understandings. If the logic is already low and if it's below that 1.48V min it will remain low until the positive going threshold (1.48V min or 1.92V max) is crossed, in which case it will go high. Same logic goes for the negative-going threshold V(t-).