• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 3 answers
  • Subscribers 18 subscribers
  • Views 186 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74AXC4T245: DIR Behavior During Power-Up/Down When xOE# is Tied to Ground

Dan
Prodigy 30 points
Part Number: SN74AXC4T245

The SN74AXC4T245 data sheet states on page 1, 2nd para in column 2, that the xOE# pins must be pulled to Vcca to ensure IOs are high-impedance during power up/down.

In section 9.2, there is a note that the xOE# pins may be pulled to GND to keep the device enabled.

However, the data sheet makes no specific mention of when/how the DIRection is assured if xOE# is tied to GND during power ramps.

Is there some window as power ramps up/down where an xDIR pin pulled to Vcca is not guaranteed to ensure the desired direction if its xOE# is tied to GND?

Section 8.3.6 references the Glitch Free Power Sequencing with AXC Level Translators application report.

   Looked at this for more insight, however, in this application report there is no mention of how the xOE# pins are configured.

  • 0
    TI__Mastermind 42600 points

    Hey Dan,

    The power up and power down conditions aren't really guaranteed since they don't fall in the recommended specification range. Saying that, the same circuitry that handles the OE input also handles the Dir input. This means, once that circuitry is supplied enough to disable/enable the I/O then the direction will also be resolved. So for example if OE is tied Low and Dir is tied High, as the device is powering up it will exit the Ioff state and will enable with direction set from A to B.

  • 0 in reply to Dylan Hubbard
    Prodigy 30 points

    Thanks Dylan.

    The way I take the response then is that all there is would be a tiny potential race condition if DIR is sensed first then OE. I presume that DIR/OE are only valid (acted on) per the Table in section 6.3 page 5 for VIH and VIL for the particular Vcca. This should limit any unintended voltage pass-through to those levels.

  • 0 in reply to Dan
    TI__Mastermind 42600 points

    Hey Dan,

    That is correct.

  • 0 in reply to Dylan Hubbard
    Prodigy 30 points

    Thinking about this a little more...some earlier 3.3V TI devices would say something like: The outputs tristate up tp like 1.5V during power ramps and then remain tristate if OE pulled high.

    Are OE/DIR sensed any lower than the published VIL/VIH or is VIL/VIH the lowest that this device gains control?

    Sensing below the 0,65V is probably very difficult but I want to better understand thissince VIL/VIH change with the Vcca selection according to table 6.3.

    Thanks again.

  • 0 in reply to Dan
    TI__Mastermind 42600 points

    Hey Dan,

    That is a specific feature called Power-up 3-State that is not included in this device. 

    Refer to this FAQ in regards to the VIH/VIL values. Since you will be pulling the input to either GND or VCCA, then your signal will either be interpreted as a Low or High respectively.