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SN74LVC8T245: Dynamic Overshoot and Undershoot

Part Number: SN74LVC8T245

Hi TI,

I am a signal integrity engineer and am looking for some kind of information on acceptable dynamic under/overshoot.

This is typically specified as a maximum value above the DC static recommended input value (or below if it is a dynamic undershoot specification) and an acceptable time period or percentage of time for a given clock cycle to be over the DC recommended operating voltage (or an area under a curve of the overshoot voltage above recommended DC value).

If I remember correctly the 8T245 has no power clamp diodes and the max. voltage is pretty high so overshoot is not presenting a problem.

There are ground clamp diodes however and this is where I could use some guidance. It's obviously safest to design to the DC value (typically +/- 0.3V) and if this were a design at the beginning of the cycle I'd do this but the design I am checking is already well along in routing and I don't want to tell them to add a hundred or more series termination resistors.

I know this is not an easy number to come up with which is why it is not in the datasheet but any rough guidance that you could provide would be greatly appreciated.

Thanks Very Much TI,


  • Hey Ned,

    The acceptable levels for the over/undershoot will be those that fall within the specs listed in the datasheet.
    On the positive side, exceeding the recommended 5.5V would be show some reduce reliability but truthfully it would still be robust. Exceeding the Absolute Maximum Rating, 6.5V, can result in immediate damage to the device.
    On the negative side, applying below 0V would be reduce some reliability but since there is a negative clamp diode there exceeding -0.5V while also exceeding the max rating of 50mA through the diode can result in immediate damage to the device.
    These will be independent of time. That's to say you should never exceed these ratings for any amount of time. 

    I'd recommend measuring the current to see if the current exceeds 50mA. If it does, you'll need to add a limiting resistor to protect the device from damage. 


  • Thanks Rami,

    I was just getting ready to present this approach.

    I saw Note 2 in the datasheet ("The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed." When I look at the IBIS model ground clamp diode it shows a negative voltage of roughly -1.1V for 50mA current so I am thinking that if I keep enough below this value according to Note 2 I should be ok. In addition this is a fast design corner case (high voltage,fastest silicon, lowest temperature) and the duration is less than 1% of the duty cycle at ~1ns duration.


  • Ned,

    You're correct about note 2. You should be okay if you hold it under the value that note 2 is referring to, which in this case is the input voltage range of -0.5 to 6.5V and the clamp current of -50mA. 
    I wouldn't set -1.1V with 50mA as your limits. The datasheet holds the most weight, so keeping it under -0.5V and 50mA would hold priority.