SN74LVC541A: SN74LVC541A Simulation Error

Mark Philip Felipe

Part Number: SN74LVC541A
Other Parts Discussed in Thread: SN74LV541A

Hi Team, Seeking your inputs.

The PSpice model for the SN74LVC541A Octal Buffer contains a subcircuit (LOGIC_TRI_STATE_OUTPUT_LVC_1i_AND_Tristate_CMOS_SN74LVC541A IN OUT OEZ VCC VEE) which has two votage-controlled voltage sources; EROH and EROL. These sources are controlled by look up tables. However, the table entries contain two outputs for a 3 volt argument (see below). If you examine the similar SN74LV541A model you'll see only one 3 volt entry in that subcircuit.

EROH NROH VEE TABLE {V(VCC,VEE)} =
+(1.65,112.5)
+(2.3,50)
+(3,37.5)
+(3,29.1666666666667)
+(4.5,21.875)
EROL NROL VEE TABLE {V(VCC,VEE)} =
+(1.65,112.5)
+(2.3,37.5)
+(3,25)
+(3,22.9166666666667)
+(4.5,17.1875)

Thank you very much.

-Mark

over 2 years ago

0 Emrys Maier over 2 years ago

TI__Guru* 96862 points

Hi Mark,

This is an issue we know about and are working on fixing -- unfortunately it has affected many devices.

For now, my recommendation is to average the two 3V lines, using the below code instead:

EROH NROH VEE TABLE {V(VCC,VEE)} =
+(1.65,112.5)
+(2.3,50)
+(3,33.3)
+(4.5,21.875)
EROL NROL VEE TABLE {V(VCC,VEE)} =
+(1.65,112.5)
+(2.3,37.5)
+(3,23.96)
+(4.5,17.1875)

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SN74LVC541A: SN74LVC541A Simulation Error