Other Parts Discussed in Thread: LMK1C1102
Customer now choose SN74AXC1T45QDCKRQ1, which is used for level shift of the 50MHz clock of the system (input 1.8V 50MHz, 50% duty cycle signal, output 3.3V signal). The Jitter and duty cycle offset are very sensitive, so customer want to know the jitter tolerance and input threshold tolerance of mass production under the high and low temperature of this chip. The jitter tolerance is used to calculate whether the total jitter on the clock chain meets the requirements, and the threshold tolerance is used to calculate the Whether the duty cycle offset of the clock signal meets the requirements.
Could we provide these data?