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SN74AUP3G14: Power consumption

Part Number: SN74AUP3G14
Other Parts Discussed in Thread: TPS3421

Hi Team,

Could you please help me with below issue? “TPS3421+SN74AUP3G14” is used in the system to reset the MCU, where SN74AUP3G14 is used to flip the reset signal. The input side of SN74AUP3G14 has a 10k pull-up resistor.

1,How to calculate the static power consumption of the NOT gate itself, is it A+B?
2,In addition, I think it is because there is a voltage difference between the input and the supply voltage of the NOT gate, which leads to the weak conduction of the upper P-MOSFET in the NOT gate, that is, there is a leakage current from VCC to GND. Could you please provide your comments? If this is the reason, how to avoid it?

Thanks and regards,

Hailiang

  • Hi Hailiang,

    1,How to calculate the static power consumption of the NOT gate itself, is it A+B?

    No calculation is required. The datasheet lists the typical and maximum values:

    2,In addition, I think it is because there is a voltage difference between the input and the supply voltage of the NOT gate, which leads to the weak conduction of the upper P-MOSFET in the NOT gate, that is, there is a leakage current from VCC to GND. Could you please provide your comments? If this is the reason, how to avoid it?

    From the schematic, I don't see any reason why there would be a difference between in the input voltage and the supply value.

    However, if that is the case, yes there will be added shoot-through current. The datasheet provides one data point for this in the deltaIcc specification:

    With a 0.6V difference, up to 50uA could be added. Larger differences can result in much larger currents.

    Again, with a 10k pull-up, I would expect the voltage to be at the rails. For a 10k resistor to cause a 0.6V change, 60uA would be required....