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SN74AVCH4T245: level translator: Any problem tying 1/OE and 2/OE to GND? Parasitic power?

Pieter Conradie
Prodigy 110 points
Part Number: SN74AVCH4T245

Hi there!

I want to use the level translator between a microcontroller (+3V3 I/O level) and a cellular (GSM) module (+1V8 I/O level). The cellular module generates a +1V8 I/O reference from it's +4V2 supply. Here is the circuit:

Level translator circuit between micro and GSM module

When the cellular module's +4V2 power supply is switched off by the microcontroller, I do not want to source parasitic current to the module via the TX and RTS pins. The datasheet states that it supports partial power-down.

I want to tie 1/OE and 2/OE directly to GND but the datasheet states: "To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver."

Is there a potential problem with this approach? Please explain.

Thanks in advance,

Pieter

https://piconomix.com