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SN74HC74: SN74HC74 behavior

Part Number: SN74HC74

Hello team,

My customer found the following behavior of SN74HC74.

Condition
 
/PRE:H
 /CLRH
  CLKL

<Behavior>
Despite retaining the above condition, the output of Q sometimes change from "L" to "H".

This behavior affect the abnormal system behavior, so the customer would like to know if the change of output Q is normal behavior in above condition. If so, would you please tell me when it can happen?

Best Regards,
Akihisa Tamazaki

  • The output can go high only when there is a rising CLK edge, or when /PRE goes low.

    Please show the schematic. The most likely cause is noise, so please show oscilloscope traces of these inputs and VCC.

  • Clemens-san,

    Thank you for your comment and sorry for my delay.
    The customer shared the schematics and waveform. Would you please see the following and advise?

    /cfs-file/__key/communityserver-discussions-components-files/151/SN74HC74NS.docx

    There are noise at output (Q) pins such as switching noise of power.  Is it possible that SN74HC74 behave abnormally affected by switching noise of power?
    Also please advise if you have other idea.

    Best Regards,
    Akihisa Tamazaki

  • There is no noise on the CLK signal.

    There is some noise on the /PRE signal (yellow), and lots of noise on the output (green):

    Apparently, whatever caused the Q noise also caused the flip-flop to switch.

    Please note that shortly before the switch, the output goes below GND. This cannot be caused by the SN74HC74 itself.

    I suspect that this noise (wherever it comes from) also affects the power rails. If VCC changes rapidly, the input switching thresholds might shift far enough that the lowest peak on the /PRE input voltage goes below VIH.

    Please show the board, and look at VCC (at the SN74HC74's pin) on the oscilloscope. If there is noise, then you do not have enough decoupling capacitance (which must be near the pin).

  • Clemens-san,

    Thank you for your prompt reply.
    I will ask the customer to observe SN74HC74 power line such as Vcc pin.
    I may ask you again when I get the feedback from the customer.

    Best Regards,
    Akihisa Tamazaki

  • Clemens-san,

    Thank you for your support.

    Vcc is connected to /PRE(yellow) directly. So Yellow (/PRE) is as well as 5V of Vcc.  What do you think?
    Should they add the decoupling capacitances?


    The customer disclosed their situation. During mass-production, suddenly this phenomenon happened in most board. 
    They swap  SN74HC74  to another board, so the customer mentioned that the phenomenon moved to another board.
    The customer has one question.  Recently SN74HC74 did change something such as design?

    Best Regards,
    Akihisa Tamazaki

  • All digital chips need decoupling capacitors. There is no reason not to add them.

    Two years ago, TI migrated to a new process. There is a new die, and the devices use roughened leadframes.

  • Hello Tamazaki-san,

    As Clemens mentioned, the HC family has been updated fairly recently to support TI's latest manufacturing process. The new die meets all of the datasheet specifications from the existing datasheet, and actually exceeds performance in all areas.

    We have always recommended adding at least one 0.1uF capacitor near the supply pins of all logic ICs. In some systems, multiple capacitors may be required.

    We built an FAQ on the topic of selecting bypass capacitors here: [FAQ] How do I select a bypass capacitor for a CMOS logic device?

  • Emrys-san, Clemens-san,

    Than you for your comment that TI support new process for HC family. I confirmed that TIJ issued PCN to the customer 2 years ago.
    The customer also confirmed it, so they will check noise at power line and evaluate additional decoupling capacitors.

    If the customer has additional questions, let me ask you offline.

    Thanks again for your prompt support.

    Best Regards,
    Akihisa Tamazaki