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SN74LVC2G34: BUFFER CIRCUIT IS CAUSING UNEXPECTED VOLTAGE DROP WHEN IMPLEMENTED FOR AN AND GATE CIRCUIT

Aagneya C
Prodigy 80 points
Part Number: SN74LVC2G34
Other Parts Discussed in Thread: SN74LVC2G66, TS5A2066

We have used the SN74LVC2G34 dual buffer gate in our circuit which is used to drive an AND gate which inurn controls a regulator that powers on the device.

the pins given to the SN74LVC2G34 dual buffer gate are being driven high from the MCU side so as to power on the regulator. voltage of the 2 lines are 3.3v but after the buffer implementation the voltage at these lines drop to 0.56V ,whereas we expect it to be around 3.3V.

when we connect it directly without the buffer circuit we see that there is no issue.

could you please confirm what is causing this drop.

also wanted to know the working of the SN74LVC2G34 dual buffer gate during initial condition (during first time power up)

 

please find the image of the circuit implementation attached and share your feedback..

regards,

Aagneya C

  • 0
    Guru 281390 points

    When the MCU is powered down, the clamping diodes at its outputs pull the voltage down. (The MCU's absolute maximum ratings forbid voltages above VCC + 0.5 V.)

    You have to disconnect the two MCU pins from the rest of the circuit while it is powered down. Use either

    • a switch like the SN74LVC2G66/TS5A2066, powered from VCC_3V3_OUT; or
    • a buffer with overvoltage-tolerant outputs (Ioff feature) powered from the MCU's supply (a second SN74LVC2G34 would work).