Hi Team,
The datasheet of SN74LV163A states that it can be cascaded to N-Bit binary counter but there is no diagram on how to do this. Do we have an application note or guide regarding this application?
Regards,
Danilo
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Hi Team,
The datasheet of SN74LV163A states that it can be cascaded to N-Bit binary counter but there is no diagram on how to do this. Do we have an application note or guide regarding this application?
Regards,
Danilo
Hi Danilo,
The datasheet provides a concise explanation of how this is achieved:
And the following timing diagram shows how those signals work in relation to one another:
Assuming a 2 device daisy-chain (device 1 counts least significant bits, device 2 counts most significant bits), the RCO output of device 1 can be tied to the ENT input for device 2, and the clock input can be shared. Device 2 will only count once when device 1 counts 16 times (from count of 15 to 0, highlighted above), which means each 16 counts will be only a single count for device 2.
In this fashion, many devices can be daisy-chained.