Hi Team,
Can you help with the inquiry below?
We previously had FPGA driving input to solid state relay, all in 5V logic. FPGA outputs were slew rate limited. Needing to replace FPGA due to DMS, but now 3.3V logic. Still interfaces with the same solid-state relay so needs 3.3V to 5V level translation. Would like to maintain a similar slew rate limit. Unfortunately, FPGA does not specify slew rate, just total propagation delay for slow slew rate versus fast slew rate (approx. 2 ns difference). We are looking for a part similar to SN74LVTH244.
Thank you in advance.
Regards,
Marvin