SN74LVC2G125: Ioff feature protecting the logic gates from being powered through IO pins when unpowered?

KKF

Part Number: SN74LVC2G125
Other Parts Discussed in Thread: SN74LVC2G08,

Hi TI Logic Team,

Just wanted to double check, when the ICs are unpowered, the Ioff feature of eg SN74LVC2G125 and SN74LVC2G08 will prevent the parts to unintentionally be powered from an signal present at the the input pins, correct?
Is there anything to account for (eg pull-up/down on the OE pins)?

Thanks a lot & Best Regards,
KF

over 1 year ago

0 Clemens Ladisch over 1 year ago

Guru 281330 points

Strictly speaking, I_off applies to the output pins. But all devices with I_off also have overvoltage-tolerant inputs, so this is no problem.

0 Germain Hebert over 1 year ago in reply to Clemens Ladisch

Intellectual 310 points

I understand for the overvoltage-tolerant. So now I want to be sure the input will not powered my VCC. Is this mean I should put resistor to limit the current?

0 Emrys Maier over 1 year ago in reply to Germain Hebert

TI__Guru* 96862 points

The phrase "when the ICs are unpowered" is vague, while the specification of I_off is very specific. If by "when the ICs are unpowered" you mean VCC = 0V, then yes, all outputs will be in the high-impedance state.

+1 Clemens Ladisch over 1 year ago in reply to Germain Hebert

Guru 281330 points

See the I_I specification and its test conditions. A current limit is not necessary.

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SN74LVC2G125: Ioff feature protecting the logic gates from being powered through IO pins when unpowered?