Other Parts Discussed in Thread: SN74AXC8T245
This is a continuation of the question below.
e2e.ti.com/.../sn74avc8t245-sn74avc8t245-power-up-procedure
Please answer any additional questions.
I am looking at the text in chapter 10 of the datasheet.
”To ensure the high-impedance state of the outputs during power up or power down,
the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until VCCA and VCCB are fully ramped and stable.”
1.
Will the SN74AVC8T245 be damaged if OE is set to "L" (enabled) during power-on?
2.
I have a question about the output signal of the buffer.
Could you take a look at the waveform and give us your comments?
Regards
Yoda