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SN74AVC8T245: SN74AVC8T245 Power-Up Procedure(Additional question)

Part Number: SN74AVC8T245
Other Parts Discussed in Thread: SN74AXC8T245

This is a continuation of the question below.

e2e.ti.com/.../sn74avc8t245-sn74avc8t245-power-up-procedure

Please answer any additional questions.

 

I am looking at the text in chapter 10 of the datasheet.

”To ensure the high-impedance state of the outputs during power up or power down,

the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until VCCA and VCCB are fully ramped and stable.”

 

1.

Will the SN74AVC8T245 be damaged if OE is set to "L" (enabled) during power-on?

2.

I have a question about the output signal of the buffer.

Could you take a look at the waveform and give us your comments?

Attached waveform1.pdf

Regards

Yoda

  • 1. If you do not care about the state of the outputs during power-up/-down, then you can simply tie /OE to GND.

    2. This device disables all outputs when one supply is at GND. However, when one supply is above 0 V but has not yet reached the recommended minimum of 1.2 V, correct operation is not guaranteed. This is what chapter 10 warns against.

    Use the SN74AXC8T245 instead; it is backwards compatible, but avoids power-up glitches.