SN74AXCH8T245: For RGMII

Jeff YANG

Genius 5955 points

Part Number: SN74AXCH8T245
Other Parts Discussed in Thread: TXV0106-Q1, SN74AUC34, TXV0108-Q1

Hi,

Does SN74AXCH8T245 suitable for below application?

We need to use it for the signals on Ethernet MAC GMII. 1.5V to 1.8V (1.8V to 1.5V). The signals include:

TX_CLK (125MHz), TXD0~D3 (4-bit RGMII signals), TX_CTL (Transmit control) → 1.5V to 1.8V (6 signals).
RX_CLK (125MHz), RXD0~D3 (4-bit RGMII signals), RX_CTL (Receive control) → 1.8V to 1.5V (6 signals)

Thanks!

Jeff

over 1 year ago

0 Clemens Ladisch over 1 year ago

Guru 281410 points

125 MHz corresponds to a pulse length of 4 ns. But the SN74AXCH8T245 has a worst-case propagation delay of 8 ns and no guaranteed skew.

The TXV0106-Q1 would be fast enough and has small skew, but does not work below 1.8 V.

A difference of 0.3 V might be small enough to work without a translator. In any case, you can use two SN74AUC34‍s running from the 1.8 V supply for TX and 1.5 V for RX; their inputs are tolerant enough.

0 Michael Ikwuyum over 1 year ago

TI__Mastermind 33415 points

Hi Jeff,

We actually released a new translator family specific to tight timing budget applications such as RGMII.

Please help see TXV0106-Q1 and TXV0108-Q1, thanks.

Best Regards,

Michael.

0 Jeff YANG over 1 year ago in reply to Clemens Ladisch

Genius 5955 points

Hi Ladisch,

1. Would you please explain why 125Mhz corresponds to a pulse length of 4 ns?

2. Seems TI no correspond to 1.5V to 1.8V 125 MHz RGMII level shift, right?

3. using SN74AUC34‍ buffer because of the VIH and VIL range is more wider that can cover the 1.5V to 1.8V, right?

Thanks!

Jeff

0 Clemens Ladisch over 1 year ago in reply to Jeff YANG

Guru 281410 points

1. One clock cycle contains one high and one low pulse, so 125 MHz = 250 Mbps.

2. Correct.

3. Correct. An AUC device running at 1.8 V accepts high-level input voltages down to 1.17 V, and an AUC device running at 1.5 V accepts high-level input voltages up to 3.6 V.

0 Jeff YANG over 1 year ago in reply to Clemens Ladisch

Genius 5955 points

Hi Ladisch,

Just double check, if our signal 1.8V, but connect to buffer with VCC= 1.5V,

Is it may caused any side effect?

Thanks!

Jeff

0 Jeff YANG over 1 year ago in reply to Jeff YANG

Genius 5955 points

Hi Ladisch,

One more clarify, how to check SN74AUC34‍ can support to 250 Mbps data rate?

From Tpd 2.5ns? 1/2.5ns= 400mbps? thanks!

Jeff

0 Clemens Ladisch over 1 year ago in reply to Jeff YANG

Guru 281410 points

AUC inputs are overvoltage tolerant.

1/t_pd is a worst-case estimate for the maximum speed.

0 Michael Ikwuyum over 1 year ago in reply to Jeff YANG

TI__Mastermind 33415 points

Hi Jeff,

Please note that the device recommendation works with 1.5V to 1.8V 125MHz RGMII level shift and is currently looked into to be updated, thanks.

Best Regards,

Michael.

0 Jeff YANG over 1 year ago in reply to Clemens Ladisch

Genius 5955 points

Hi Landisch,

My cusotmer is curious about why using 1/t_{pd to estimate for the maximum speed?}

_{Does TI have relative document for this?}

_Thanks!

_Jeff

+1 Clemens Ladisch over 1 year ago in reply to Jeff YANG

Guru 281410 points

Assume that the input is low. When you make it high, then wait for a time of t_pd or longer, then go low again, then it is guaranteed that the output has reached the high level before it goes low again, i.e., the input signal has been successfully transferred to the output.

If you would wait for a shorter time, then it it possible that the output has not yet reached the high state when it goes low again.

So t_pd is the guaranteed minimum length of a bit that can be transmitted.

(In practice, the maximum speed is somewhat higher, because the buffers inside the chip are somewhat pipelined. But it is impossible to estimate this if the datasheet does not give you information about it.)

0 Jeff YANG over 1 year ago in reply to Clemens Ladisch

Genius 5955 points

Hi Landisch,

Got it, very appriciate for your explantion.

Logic

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SN74AXCH8T245: For RGMII