Other Parts Discussed in Thread: SN74LVC1GX04
Tool/software:
Hi team:
We are currently trying to use two converters to transfer current mode signals (+550uA/-550uA) to voltage mode signals(0V/1.8V), here is the simulation circuit
Here is the simulation result, seems the circuit works.
But I have a question about how this inverter works in this circumstance, since CMOS inverter has the topology as following
Why there is a bias at the input of inverter, how the resistive feedback causes this bias at gate of two mosfets? this bias is reasonable if it's a OPA, but it's actually a inverter with two mosfets combined. And as illustrated in the simulation result, these bias voltage levels (1.2V and 0.6V) are between VIL and VIH of a inverter, does that mean the first inverter works at transition region?
Could you explain me how this two mosfets combined inverter with a resistive feedback can cause bias at input and eventually resulting the right high and low voltage level at output?
Thanks.