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SN74AXC8T245: Behavior when switching direction signals during operation

Yosuke Okada
Prodigy 10 points
Part Number: SN74AXC8T245

Tool/software:

Is it possible for this device to switch the direction of pins 5-8 with a direction signal only during the read sequence of the QSPI interface?

I want to use it by controlling DIR1=Hihg and DIR2=Low in normal operation, and DIR1=Hihg and DIR2=High only when the peripheral side returns read data.

  • 0
    TI__Mastermind 34065 points

    Hi Yosuke,

    Yes, you may use pull-ups and pull-downs (typically, 10K ohms) to tie DIR to any default state of interest then use the control signal to change DIR as needed, thanks. 

    Best Regards,

    Michael. 

  • 0
    Prodigy 10 points

    Hi Micheal

    Thanks for the reply

    When switching DIR, can OE remain Low=GND?

  • 0 in reply to Yosuke Okada
    Guru 286730 points

    Yes; the SN74AXC8T245 itself does not care.

    Your circuit must be able to provide signals to the input pins and to handle the signals driven by the output pins. Depending on the overall design, it might be preferrable to disable the outputs on both sides for a short time. But if you want to switch all inputs and outputs immediately, then you can do so.

  • 0 in reply to Clemens Ladisch
    Prodigy 10 points

    Thanks for the reply

    ch1(Yellow):PortA Output QSPI D0(To controller)
    ch2:(blue): PortB Input QSPI D0(from Peripheral)
    ch3:(purple):CLK
    ch4:(Green):DIR2
    DIR1=always High

    After DIR2 is switched, the waveform of the intermediate potential is output from PortA.
    After that, read data is received to PortB, but PortA is low only up to the intermediate potential.

    Do you know if there's a problem somewhere?

  • 0 in reply to Yosuke Okada
    Guru 286730 points

    The intermediate potential should not happen. I'd guess that the controller will not able to read these bits correctly. (I do not know the QSPI protocol, but it looks as if none of the low bits get through.)

    The intermediate potential probably happens because multiple devices are driving the line. The AXC's output would be much stronger than a pull-up resistor, so I guess that the controller's output is still active and drives high.

    Are the level shifter's I/O pins connected directly to the controller's QSPI pins, or are the other components? Please show a schematic. How are the QSPI pins configured?