Other Parts Discussed in Thread: TXG8122-Q1
Open-Drain Architecture
For I2C applications, the allowable distance between systems is primarily limited by total bus capacitance. The I2C specification limits bus capacitance to 400pF for Standard and Fast Mode, and 500pF for Fast mode Plus. These same limitations apply when using devices such as TXG8122-Q1.
Total bus capacitance is determined by two main factors:
- Input Capacitance - Each SDA and SLC pin contributes ~5pF. While this is minimal for a single device, the total input capacitance increases as additional peripherals are added to the bus.
- Cable Capacitance - A common rule of thumb is approximately 1pF per centimeter of cable length. Under Standard Mode operation, this limits cable lengths to approximately 4 meters (13 feet).
To support higher capacitive loads, is it recommended to place TXG8122-Q1 Side 2 (SDA2 and SCL2) with all other I2C peripherals.
