• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 21 subscribers
  • Views 108 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CD4013B: V_IL max and how to set Q1 to Low

Noriyuki Takahashi
Genius 11570 points

Part Number: CD4013B

Hi team

There are two questions. Could you support these?

  • Could you tell V_IL(max) at VDD = 3V?
  • They want to set Q1 to Low when the VDD is turned on.  During this time, there are no signals in CLOCK1 pin. They want to prevent Q1 from being uncertain after the power up. Could you tell any ways?

 

Regards,

Noriyuki Takahashi

  • 0
    TI__Genius 13791 points

    Hi Noriyuki,

    For values outside of those provided in the datasheet, we recommend using linear interpolation. In this case, that gives an expected VIL(max) of 0.9 V at VCC=3V.

    Q1 will always startup in an unknown state. This is a trait of flip flops. To minimize the time of an unknown state as much as possible, you can use an RC circuit to to send a VCC pulse to the reset pin on start up. Doing this with a non-Schmitt trigger device isn't recommended by TI, as this may reduce device reliability.

  • 0 in reply to Ian Graham
    TI__Genius 11570 points

    Ian,

    Thanks. 

    Ian Graham said:
    Q1 will always startup in an unknown state.

    They also want to know how to set Q1 to low after the start up. Could you please confirm this?

    Regards,

    Noriyuki Takahashi

  • +1 in reply to Noriyuki Takahashi
    TI__Genius 13791 points

    You can use an RC circuit to to send a VCC pulse to the reset pin on start up. Doing this with a non-Schmitt trigger device isn't recommended by TI, as this may reduce device reliability.