We are using the below latch and level translators in our design
1. SN74LVC16373A - Latch- OE pins are recommended to be pulled high with VCC
2. SN74AVCH8T245 & SN74AVC16T245 - Level Translators - OE pins are recommended to be pulled high with VCCA
In all these scenarios, we have VCC & VCCA are with 1.8V and the respective port Input are of 1.8V logic. Level translators are used for 1.8V to 3.3V translation.
We are in a situation to control this OE pins through a same external control signal, which is coming out of a CPLD powered with 3.3V.
Kindly suggest whether can we connect a 3.3V level signals to these OE pins (or) do we need to configure this CPLD pin as Open drain and can have a single pull up resistor to 1.8V and the same line can drive all these OE pins.
Thanks & Regards,
Felix.