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High Supply Current Spec SN74AHC595 & SN74HC132

Kieran Peleaux
Prodigy 50 points

Hi there,

I'm new to these forums, so I hope I'm posting in the right section. First off, this question is regarding datasheet information only at this point--no testing has been done to confirm/discount the Electrical Characteristics I'll refer to.

As mentioned in the title, I'm trying to understand the source of higher-than-expected supply current specs for two different TI digital ICs (I'm looking at the DIP versions of both if that's relevant). The first is the SN74AHC595, an 8-bit shift register. where the Icc spec is listed as 4uA max at room temperature (and up to 40uA max at wider temp ranges). Note that these numbers do specify the Icc when Vi is either Vcc or GND. Similarly, the SN74HC132--a quad 2-input NAND package--lists an Icc max of 20uA. 

In any case, supply currents in the ranges of uAs to 10s of uAs for any of these digital ICs seems high to me. I'd greatly appreciate any insight as to what the main components of this current draw are. Initially my colleagues and I were wondering if the ESD protection circuits could be causing extra current draw, but the likelihood of reverse-biased diodes drawing that much current seems low. Additionally, a TI employee my colleague reached out to confirmed that the diode leakage should be in the pA range.

Thank you in advance!

  • 0
    Guru 243910 points

    Advanced High-Speed CMOS (AHC) Logic Family (SCAA034) says:

    The quiescent current is the reverse current through the diodes that are reverse biased. This reverse current is generally very small (a few nA), which makes the quiescent power insignificant.

    The typical values are much below the theoretical maximum.

    I don't know how that maximum was determined, but it probably involved wearing the device out by stressing it at extreme temperatures for years, or something like that. If you'd ever came near that maximum during normal operation, something would be horribly wrong.

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    That's good to hear. So am I understanding correctly that the majority of the quiescent current should come from the ESD protection diodes? And that a safe assumption for the value of typical quiescent current draw would be in the single digits of nano amps? I appreciate your help!

  • 0 in reply to Kieran Peleaux
    Guru 243910 points
    Yes, that's what it says.

    (I'd expect part of the quiescent current to be leakage currents of the various MOSFETs, but I don't know how large they are compared to the diodes.)
  • 0 in reply to Clemens Ladisch
    TI__Guru 56070 points
    Hi Kiplo ,

    The Icc current is measured at the Vcc pin terminal and indicates current at the no-load condition Io =0 and input is at one of the rails :Vcc or gnd). The Icc is always positive since there cannot be current coming out of the device(free power). The behavior of the nmos and pmos results in consuming tiny currents from the supply and is not related to input gate leakage of MOS. This current flows from Vcc to gnd.
    The input leakages are measured at the input terminals which is the current flowing in or out of the input pins and hence the current can be either positive or negative. This is measured at the gate of the MOS which is assumed to be high impedance .
  • 0 in reply to ShreyasRao
    Prodigy 50 points

    Hi Shreyas, 

    Thank you for the overview. I think I understand all of that. The Vcc current at no-load being in the realm of 10s of uAs still seems pretty high to me. Would you endorse the answers Clemens gave earlier regarding the specified Icc ratings?

    Thanks!

  • 0 in reply to Kieran Peleaux
    TI__Guru 56070 points
    Kiplo ,

    The 10s of uA represents the statistical variation following a normal Gaussian curve of accounting for various factors including process, test & temperature . The measured value will be guardbanded with six sigma variation to not have significant yield losses.
    Usually, it would be in 100s of nA typically.