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SN74AVCH4T245: SN74AVCH4T245 Partial Power-down Currents

Part Number: SN74AVCH4T245

Hi,

I’m evaluating the partial power-down currents specified in the TI datasheet for an SN74AVCH4T245.  My test results don’t correlate with my literal interpretation of the datasheet.

The partial power-down leakage current is specified as -2uA maximum.  In evaluating the current of the powered-down supply with VI at VCC and VI at GND for the power-down supply across the industrial temp range (the 4 corners - if you will), there is only one of the 4 conditions where I observe values below the -2uA limit.  For all other conditions the current is “negligible” which fails the -2uA maximum limit.

I would like to know if my observations are correct.  If they are correct, a brief physical explanation of the reason would be appreciated.  If they are incorrect a detailed description of the test setup conditions would be appreciated: 

Observations

VCCA powered-down (0V), VCCB at 3.6V (results are the same with VCCB powered-down and VCCA at 3.6V).  Voltages on DIR and OE appear to be don’t care:

-40C:  ICCA with A inputs at 3.6V is in the -85nA range (fails -2uA max)

-40C:  ICCA with A inputs at GND is in the -75nA range (fails -2uA max)

85C:  ICCA with A inputs at 3.6V is in the -4uA range (passes -2uA max)

85C:  ICCA with A inputs at GND is in the -80nA range (fails -2uA max)

(Room temps are ~-150nA at 3.6V and ~-70nA at GND)

Thanks,

Mike

  • Hello Mike,

    I am confused by your data. Why is -85nA considered a fail? It is within the -2uA spec.
  • TI specifies -2uA as the "maximum" current (with no minimum specified).  -85nA exceeds that maximum and is "out of spec".  

    If -2uA were the minimum -85nA would be within spec.  However, once you reach 85C the current drops below the -2uA (now minimum) limit and is out of spec.

    I'm not sure TI knew exactly how to specify it.  I'm not sure I could do any better.  My thinking would be designers won't care if there is "negligible" current .  Also the fact that the powered-off supply is sinking current is odd.  Designers will want to know that the supply leakage current will "decrease" (sink more current) as the temperature rises.  It makes sense to me, but the datasheet is specified in such a way that one would expect the supply to sink 2uA (sink 2uA = -2uA) or more across all temps.  That is not the case in my findings.  And I would consider a good thing.  If my findings are correct I think a better way to specify the leakage current would be to bound it with a minimum and a maximum (similar to input/output current leakage on the pins).  For example, -10uA minimum with 0uA max.  That way you know it's always going to sink current, but it won't sink any more that -10uA across the temperature range.

    I know this is nit-picky, but some people get concerned when test results don't meet the spec to the letter.  When that happens, they want to know why.  I just need confirmation that my observation are expected.  An explanation why the powered-off supply sinks current with VI high, but doesn't when VI low would be appreciated as well.

  • Section 3.3 of Understanding and Interpreting Standard-Logic Data Sheets (SZZA036) says:

    All currents are defined with respect to conventional current flow into the respective terminal of the integrated circuit. This means that any current that flows out of the respective terminal is considered to be a negative quantity.

    All limits are given according to the absolute-magnitude convention, with a few exceptions. In this convention, maximum refers to the greater magnitude limit of a range of like-signed values; if the range includes both positive and negative values, both limit values are maximums. […]

  • Thanks - that clears up my the -2uA limit confusion.

    On to measuring "over" the -2uA limit at 85C.  It appears from figure 8 of Voltage Translations (SCEA030B), the supply leakage spec is per input, with the input active(HIGH).  I could not find this stated explicitly.  I was measuring -4uA with all 4 inputs "active."  I split them out to one input high at at a time and measured -1uA per pin which is within the -2uA spec.  I expect that's the proper method (or I could have set the limit at -8uA).