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SN74GTL2003: Variable SREF voltage pullup resistor calculations

Part Number: SN74GTL2003
Other Parts Discussed in Thread: TXB0108, TXS0108E, SN74LVC2T45, SN74AVC2T45, LSF0108

How do you calculate the pull up resistors for the SREF port when the input voltage can vary from 1.2V to 3.3V, form an FPGA module source. And the DREF port is a fixed voltage of 3.3V. The DREF resistors are easily calculated. However for the SREF do you design for the 3.3V potential voltage, and then the lower voltages are covered?

  • Hi Mark ,

    Having a variable voltage on SREF is fine as long as the DREF> ~ SREF+0.7v . however , in this case where the SREF can be equal to DREF is not acceptable.
    what is the application and operating requirements and i can suggest another suitable part.
    Do you think TXS or TXB family (TXS0108e or TXB0108) would work in your case assuming 8 bits required ?

  • Hi ShreyasRao

    The application is an FMC type card, were several connectors on the FMC are passed out to a Digilent PMOD header block. As such the FMC card is connected to the FPGA via the FMC connector, but their are post headers on the board  for debug purposes. The FPGA will either drive the signals at 1V8 / 2V5 / 3V3 and potential 1V5, depending upon the application. The signalling will be bi-directional in nature, so a form of auto-sense is needed on a per-signal level.

    Also I would want to keep the propagation delay down as low as possible as the signals could be driven at up to 250 MHz , either SDR or DDR transitioning at this level.

    The TXS / TXB parts seam to have a 4ns propagation delay which may cause issues at 250 MHz. 

    I'm also investigating the use of the LSF010x device, although I'm slightly confused about the comment of the 250 ohm and the <35pf capacitor placements as suggested in the application section.

  • 250Mhz is high speed for the translation devices. TXB/ TXS cannot reach high speeds because of the internal design constraints.
    LSF could potentially go high speeds for down translation , however, being a passive translation device , it has its own limitations and requirements. It requires Vrefb>Vrefa +0.8V and also constraints on the pullup resistor to be small enough to have sharp rising edge , which means the driver must sink all the current generated during the low state.
    would you consider using SN74LVC2T45/ SN74AVC2T45 which are direction controlled translation devices and can have Vcca= Vccb , and could reach up to 250Mhz max data rates. of course ,low capacitance necessary at high speeds.
  • I read that you have bidirectional signals and auto direction devices are ideal . how often does the direction signal needs to change ?
  • The directional change may only happen at bring up, or it may happen during operation. The end card will determine how this is done. It may be using an I2C bus interface, a SPI interface / UART interface or maybe a custom bus interface, with a control bit that sets the direction of data flow for other signals. The issue here is that their is no way to control the direction at a given time hence the auto sense capability. Your previous suggestion of the SN74 device family looks alright, however this is a bus controller, and every thing is driven in the same direction on all the bins at once. I need to have a variable direction sense on each pin, but also need to limit the number of components on the board, so multiple single bit translators would be an issue, as this would need to be placed on over 64 signals.
  • Hi Mark,
    I don't know of any auto-bidirectional translators that can support 250 MHz. Passive translators like LSF0108 and GTL2003 are limited by the up-translation speed, which is linked directly to pull-up value and parasitic capacitance. If a line has very minimal capacitance (ie 2-5pF, I have seen good translation up to ~100MHz, however anything past that is unlikely to work.