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SN74AHC244: Input overshoot voltage / overshoot current limits

Part Number: SN74AHC244

The datasheet for the subject AHC device states that undershoot (input voltages that go below 0 V) must be constrained to -.5V (must be no more negative than -.5V) OR of the undershoot goes more negative than -.5V, then the input current must not exceed 20mA in order to guarantee safe operation of the device.

Unfortunately, there is no corresponding overshoot voltage / current limit.

The subject device datasheet states that Vin max is 7V and VCC max is 7V (from the absolute ratings section). This might mean that inputs can go to 7V but only when the power supply is also 7V, OR it might mean that inputs can be driven to 7V no matter what the power supply voltage level is. I am tempted to interpret this as the former and not the latter because the limit is not given as Vin < VCC + max overshoot voltage.  

When I run simulations of input voltage and current when driving the subject device so that overshoot and undershoot exists, I am seeing significant current at the input even though the overshoot is only about 6V. In other words, VCC = 3.45, Max overshoot voltage with respect to ground = approx 6V, resulting overshoot input current = 16.6 mA. However the data sheet gives no max safe input current for an overshoot condition.

Question 1: For AHC logic (for the subject device) what are the max safe input overshoot voltage and current limits? The data sheet seems to cover negative going (undershoot) conditions very well. What about positive going (overshoot) conditions?

Question 2: The AHC user guides seemed to suggest that the input positive clamp shouldn't turn on until the 15V breakdown voltage of an internal transistor which then triggers a clamp thyristor to turn on. In my simulations using the subject part's ibis model downloaded from TI's website, I see the input begin to conduct significant current well below 15V. What is the normal turn on voltage of the input protection (positive clamp)?

(From the AHC designer's guide) : "Figure 12 shows protective circuits used for advanced high-speed CMOS devices. To meet the requirements outlined previously, the protective circuit is constructed in two stages. The input is first protected by a thyristor consisting of transistors Q2 and Q3. This provides coarse protection. If the input voltage rises above about 15 V, transistor Q1 breaks down and fires the thyristor.")

Thank you