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TXB0101: UART 3.3V Signal Conditioning at 4.5 MHz: Components or Circuits that keep the original signal quality even when daisy-chained hundreds of times

Part Number: TXB0101

Hello,

I would like to build a long tree topology bus that works in half duplex (polling with central arbiter) and consists of many small segments that can be cut off temporarily, in each of which, a microcontroller is connected. That means, I need many switches on the bus, for disconnecting the segments. And in order to have sufficient output capability at branch-off points, transceiver or fanout functionality is needed as well. TI suggested using TXB0101 or SN74LVC1T45, but at the time I had not completely described the problem. At the moment, I am starting to use TXB0101. The direction auto sensing simplifies the system quite a bit, compared to having a lot of direction controlled transceivers that all need to be direction switched at the same time for implementing half duplex.  

The original signal is coming from a microcontroller UART TX at 3.3V to GND (single wire).

Each bus segment between two transceivers is roughly 50 cm long and I treat it as a short transmission line without reflections. The short length also means that from one bus transceiver to the next one, signal degradation is quite small. Regarding fanout, on each segment there is also a possible tree branch-off point for ideally up to 8 branches. Therefore, the maximum load of a transceiver output are a number, ideally 8, of the same type of transceiver inputs (for maximum of 8 tree branches at each segment), plus a UART RX of a microcontroller that is listening to the bus in each segment.

While the signal doesn't change a lot from the A input to the B output of one of those TXB0101, I fear that when having many of them in a row, gradually the signal will be more and more different from the original 4.5 MHz signal (the idea is to have hundreds of bus segments). In addition, noise will gradually degrade the signal on each of the bus segments.

My first question is, do TXB0101 or SN74LVX1T45 help keeping the signal quality stable when I use them on the bus, or will they rather degrade signal quality? (for instance by slightly changing the timing or rise/fall times etc until the signal is not recognizable?) Especially when using many of them in a row? I understand that the signal form they generate is comparable to that of the original transmitter (a microcontroller UART), but I am not sure that the signal duration will not change slightly which each additional switch/transceiver I use? Is this understanding correct?

The second question is if transceivers or similar components exist that can regenerate an input as a "new, clean" 3.3V output with a certain bit rate, in my case 4.5MHz. For instance, if the input signal is high, then around 2 bits (perhaps 460ns instead of 445ns) low and then high again, the generated output should have clean rise&fall edges and lengths that correspond very well to the 4.5MHz (445ns). This behaviour will probably involve some propagation delay, maybe 0.5-1.5 bits, as bit durations that have become a bit too long need to be detected as well and shortened to the correct length at 4.5 MHz.

Or said differently, can you suggest a mechanism to keep the original signal quality after many transceivers or fanout buffers / switches that are put in a row on a data line at short distances, given that the constant bit rate is known everywhere? 

(Differential signaling is interesting too for reasons of EMC and will eventually be implemented if necessary for those reasons. But the question remains the same, are the many transceivers/switches/fanout buffers not gradually changing the signal, and what can I do about this effect adding up to an amount that alters bits in the signal)

Thank you, if something is not clear, I am ready to clarify, or to provide a sketch of the tree-shaped network I imagine etc.

  • You cannot use multiple TXBs in a row: the auto direction sensing feature requires it to have weak output drivers so that the other device is able to override the signal level. So when two TXBs are connected to each other, neither one is strong enough to drive the other's input.
    (The only purpose of TXB devices is level shifting; as far as I can see, you do not need that.)

    The "A" in "UART" stands for "asynchronous"; it means that the signal itself does not have a clock (and that both devices must have internal clocks that are sufficiently accurate). Regenerating a signal is possible only if the clock is known; for an UART signal, this would require a microcontroller (with its own clock) that re-sends all data it receives (or a separate UART chip, which would be even more expensive).

    Anyway, 4.5 MHz is not really much; you should get acceptable results with plain logic buffers (SN74xxx1G125).

    It probably will not matter, but with differential signalling, asymmetric distortions in the rising/falling edges are likely to cancel each other out.