If any voltage over VTH is applied to A,B pins before VCC voltage is applied ,please let us know Y output behavior.
Hello,
VTH (input threshold voltage) is not a specified value for this device -- it is very uncommon for a standard CMOS device to have a defined threshold in the datasheet.
What are specified are the VIH (High-level input voltage) and the VIL (Low-level input voltage), as specified in the recommended operating conditions:
Now that we've cleared up what constitutes a HIGH input or a LOW input, we can move on to the function table. The SN74AUP1G08-Q1 is a single 2-input AND gate. Here's the function table from the datasheet:
This shows that any combination of A and B that includes a LOW input will result in a LOW output, and when both A and B are high, the output will drive HIGH. The next question is, what constitutes "driving high" or "driving low." This can be found in the electrical characteristics table of the datasheet:
The VOH values shown indicate the worst-case output HIGH voltage under the given conditions. For example, at 25°C, 3V supply, the output voltage with a 4mA load will be greater than or equal to 2.6V.
The same thing can be shown with VOL, but hopefully this explains what you needed to know.
Please let me know if I can be of further assistance.
Hi Kura-san,
The SN74AUP1G08-Q1 has Ioff (Partial-power-down protection), which controls the device when Vcc = 0V.
Ioff is explained in the FAQ here:
Basically, this just says that the output will be high impedance if the supply is 0V.
