QH pin of SN74HC165PWT will jump from high level to low level (normally high level).
When the input of SN74HC165 parallel port works normally, it is 10K resistance pull-up(CheckD1~D10).
Is there any risk of damage to the chip by hot plugging and grounding these parallel ports during detection?
Or there are other possible reasons for abnormal QH voltage.
By default, when all pins of CheckD1-CheckD10 are pulled up (no pins are pulled to DGND), the output of SHI_QH2 should always output high level;
while the output of abnormal machine (U2 abnormality), SHI_QH2 has low level; the following figure is the waveform captured by the FPGA terminal.