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SN74LVC1G97: SN74LVC1G97

Shlomi Yehezkia
Mastermind 6150 points
Part Number: SN74LVC1G97


Hi Team,

500uA is awful high.

What happens if one input is at VCC-0.4V. Will it still draw high current? What will the ΔIcc be then?

Thanks,

Shlomi

SN74LVC1G97.docx

  • 0
    TI__Guru* 97066 points

    Hi Shlomi,

    It sounds like you aren't familiar with shoot-through current. We have an FAQ that explains this fairly well located here:

    "What happens if one input is at VCC-0.4V. Will it still draw high current? What will the ΔIcc be then?"

    You have described the definition of ΔIcc.  The value will be 500uA (max).  We recommend against holding an input so far away from the rail in a CMOS logic system. If this is a requirement of the system, a voltage translator can be added to reduce power consumption.

  • 0
    Guru 318050 points

    500 µA is the maximum under the most extreme environmental conditions and when the gate threshold voltage happens to be very small.

    The gate threshold voltage will never be as low as 0.4 V, so at VCC − 0.4 V, the current will be practically zero.

    Are your input signals really at VCC − 0.4 V? This sounds like the voltage drop at the highest output current, which does not happen with a high-impedance CMOS input. What drives this input signal, and is there a pull-down resistor?