Dear TI Experts
Can you help check the internal block of SN74HC165?
I'd like to know whether these three pins are connected to VCC internally:
CLK;CLK_IN;SH/LD
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These three pins are CMOS inputs. HCMOS Design Considerations (SCLA007) says:
Input-Gate Circuit
A simplified schematic of a high-speed CMOS input gate is shown in Figure 25. The diode (D1) and the transistors (Q1 and Q2) provide static discharge and input transient clamping for the device. Any inputs higher than VCC + 0.5 V or lower than –0.5 V clamp the input. The capacitors (C1 and C2) represent the parasitic capacitances present at the gate input. The data sheet specifies that the input capacitance (C1 + C2) does not exceed 10 pF (typical is about 5 pF). The input capacitance is split between VCC and ground of the device and provides a feedback path between VCC and the input. If the input is driven by a high-impedance source, any transient noise on VCC may be coupled back into the input.
As long as the input voltage does not exceed VCC, the input is effectively isolated from VCC.
Hi Qianqian,
The datasheet shows a simplified block diagram of the CLK and Clemens provided a more detailed schematic of this input. Getting more info on the issue you are seeing and a schematic will allow me to help you debug this issue.
Hi Qianqian,
I'm still not sure what the problem is here, can you elaborate?