CD4001UB: Initial Output stage of Q and Qbar

Navin Kumar2

Part Number: CD4001UB

I am using the CD4001UBM96 chip, which is a nor gate. I am using two of it's nor Gate to create an SR latch. Now I am not sure about the initial output stage of this circuit, as which nor gate will be powered on as the chip gets the supply, is not known to me?

So, can you please help me with this? Basically I want to know which nor Gate will be powered on first, is it random or particular?

over 6 years ago

0 Clemens Ladisch over 6 years ago

Guru 320720 points

Unless you add additional components to force the initial state, it's unknown.

0 ShreyasRao over 6 years ago

TI__Guru 63040 points

Hi Navin,

you can consider using the JK flip flops available below:

with the PRE and CLR inputs, you can select the default power up state of the device.

0 Navin Kumar2 over 6 years ago in reply to ShreyasRao

Intellectual 380 points

But the problem remains the same. Now I have to give reset high and then bring it to low.

So, is the initial stage output unknown to D latch as well? Or is there any other circuit that can perform this task?

0 Clemens Ladisch over 6 years ago in reply to Navin Kumar2

Guru 320720 points

All latches/flip-flops have an unknown initial state.

The simplest way to generate a preset/clear pulse at powerup is with a resistor+capacitor.

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CD4001UB: Initial Output stage of Q and Qbar