Hi,
We have a new application that uses your SN74LVC2G241DCTR dual buffer. In our case we are only using the second buffer. Pins 1 (1OE) and 2 (1A) are tied to GND. Pin 8 (VCC) is tied to a 3.3V supply via an LT1761-3.3 regulator. Pin 7 (2OE) is connected to a power on reset IC (ADM809TART) this part is power by the 3.3V supply. Pin 5 (2OE) is being driven by an LT1716 comparator. Unfortunately VCC for this comparator is connected to a 6.9V power supply. So when the comparator switches to a logic HI state there is 6.9V applied to Pin 5 of the SN74LVC2G241. This exceeds Pin 8 (VCC) by 2.6V. In our system this condition only occurs intermitently. We are implementing a fix but would like to understand the risk in systems we have already built. What happens to the SN74LVC2G241 if 6.9V is applied to pin 5? Will this cause the device to fail? If it fails what is the failure mode?
Any help is appreciated.