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SN74LVC125A: about the SN74LVC125A input signal slew rate

Part Number: SN74LVC125A
Other Parts Discussed in Thread: SN74HCS125

Hi team,

For the slew rate requirement, how to judge the slew rate? 10%-90% or ViL~VIH or others? Currently my customer's waveform is below. The waveform has a flat period, how to judge the risks?(green one)

 

 

  • Any voltages below VIL or above VIH are guaranteed to be read as a valid logic level, so the Δt/Δv restriction cannot apply outside this range.

    Please note that if you judge the slew rate by measuring the time from when the voltage crosses VIL to when it crosses VIH, you compute the average transition rate, but that the Δt/Δv restriction applies to all points of the curve. If any part of the edge is flatter than 8 ns/V, then it is outside the specification. And the flat part of this particular curve is right near the transistion, where it could actually lead to oscillations.

    Normal LVC inputs have a hysteresis of about 100 mV to increase the noise margin about the switching threshold, but this is not guaranteed to make the device handle slow inputs. If you exceed the Δt/Δv restriction, you should devices with real Schmitt-trigger inputs.

  • Hi Frank,

    Please see Clemens' reply, as well as the following FAQ:

    Thanks!

    Chad Crosby

  • Hi,

    Thanks for your reply. Currently the customer VIL and VIH slew rate is ok. But the within the VIH and VIL, we have a very small slew rate(flat period). Whether it has risks? 

  • Hi Frank,

    Section (2) of the FAQ says that oscillations may occur on the output if the input lingers (as yours does) around the switching threshold. So yes, this input signal may cause issues.

    It would be recommended to switch to a device that has Schmitt Trigger Inputs if this is to be the expected input waveform for the device. We'll be releasing the SN74HCS125 this quarter that should be a perfect fix for this issue.

    Thanks!

    Chad Crosby