My customer used two pics SN74HC165 as cascaded configuration. According to datasheet guideline two device CLK should tie together.
I have a questions about time sequence requirement for device1 shift its data to device2 through SER pin.
As two device using the same CLK signal, both of them will receive a edge signal to trigger one shot shift behavior. In the mean time device2 will also start to shift the SER PIN input data. But as there is a delay between CLK edge and QH pin signal output( it will be device2 SER pin input ). So if this delay is too long the data is not flip during shift the SER PIN input, it may lead to data loss in device2.
I wondering to know, should I add some cap in device2 CLK pin to add some delay between device1 CLK and device2 CLK to make sure the data signal is already setup up in device 2 SER PIN to avoid missing a data bit?
By the way, I also want to know what the third waveform mean for? Is it mean input signal should be ready (finished setup) before CLK edge signal?
What' the reference input mean for?