I am writing labview code to control NIDAQ digital lines to write bits to the shift register. I saw the timing diagram in the spec sheet and I understand it, however I am wondering if SER digital waveform and SRCLK need to be perfectly synchronized and clocked at the frequency of the chip, or if the timing is not important and i can simply do the following: in order to write , lets say, bit 1, I would raise SER line, then some time later, raise SRCLK, to have the chip read that bit in, then lower SER line and then lower SRCLK line without concern for the timing as long as its longer than minimum required in the spec sheet.
Thank you
