Other Parts Discussed in Thread: SN74HCS594
Customer is asking whether the output of QA~QH is low or high after powering up. What they require is low level. Could you please help check for them? Thank you.
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Customer is asking whether the output of QA~QH is low or high after powering up. What they require is low level. Could you please help check for them? Thank you.
Yes, the outputs are low or high after powering up. See [FAQ] What is the default output of a latched device? (Flip-Flop, latch, register)
Forcing all outputs low requires a low SRCLR pulse, and then a RCLK clock edge.
The SN74HCS594 has RCLR to directly clear the outputs.
Clemens,
Thank you for the support. So they can force RCLR low to make sure SN74HCS594 output low after powering up?