SN74LVC1G240: Enable PIN for Low output

Thanks for suggestion.

Is there similar Function Table with Nor gate for 8ch?

Regards

Brian W

The largest devices (e.g. SN74AHC02) have four NOR gates.

Thanks.

If we keep using SN74ACT240PWR as 8ch logic IC for PWM driving.

How to make that when /OE pin is high and output is low? To connect a pull-down resistor to GND on output pin, is this ok?

Regards

Brian W

What are the voltages of the input and output signals? What drive strength do you need (when active, and when inactive)?

+/-15mA driving strength.

Input Voltage = 0 - 5V

Output Voltage = 0 - 5V

How about the pull-down resistance?

Regards

Brian W

Pls find below application diagram. When /OE is asserted from Low to high level, both OUT1 and OUT2 are in high impedance state,

Thus in this state, there is no current flow goes through the UCC23511(I = 0A), correct?

If above is ok, the pull-down resistor can be removed, right?

The emulated diode in the UCC23511 detects the current, not the voltage, so high-impedance outputs or pull-down resistors are indeed not needed. (But like a real LED, it always needs a current-limiting resistor.)

Actually, a single UCC23511 needs only a single signal to control it. Are you using two gate drivers in an interlock architecture (figure 8-3 in the datasheet)?

Why are you using an ACT device? Do you actually need TTL-compatible inputs (3.3 V high level)?

Do you actually need inverters? Modern logic families also have plain buffers (74xxx244), but if you need to modify your software, it's probably not worth it.

To simplify board layout, consider using devices with a flow-through pinout instead (74xxx540 inverter, 74xxx541 buffer).

With the requirements known so far, I'd recommend the SN74LV540A. (The non-inverting SN74LV541A would be cheaper.)