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LSF0204: schematic check with LSF0204

Part Number: LSF0204
Other Parts Discussed in Thread: SN74AXC4T774

Hi team,

we met one problem on LSF0204 and i attached the schematic below:

P20PCMS_G1_M1_VA_SCH _ 24-LEVEL.pdf

U8----MUX;

U10----Level shift;

MUX 2A pin from NXP LS1020 SOC SPI interface-SCK

      When MUX S=1 (3.3V), MUX 2A=2B2 to 3.3V SPI FLASH device; (2A=0V, 2B1=3.3V)

      When MUX S=0 (0V), MUX 2A=2B1 to level shift device; (2A=0.7V 2B1=0.7V,level shift A2 pin=0.7V)

      When remove mux device, and short mux 2A and 2B1, 2A=2B1=level shift A2 =0.7V

we need to access the SPI FLASH(1.8V system) for PCI SWITCH Software update by using LSF0204 for 3.3V to 1.8v level shift, but for now, since Vi Low=0.7V, we could not access 1.8V FLASH. 

could you help and give us some insight on finding the root cause?

BR

Brandon

  • The pull-up resistors are extremely strong and generate a current of more than 30 mA. I'd guess that the SoC's (and the flash's) output drivers are not strong enough for that.

    The notes on the schematic say that the pull-ups were sized for 15 mA. But the two sides of the LSF are connected together. And why 15 mA? Depending on the required speed, a smaller current might suffice. (This also depends on the total capacitance on these lines.)

    (And the EN pin is overvoltage tolerant; you do not need the voltage dividers.)

    It would be a better idea to use buffered translators like the SN74AXC4T774. It would also be possible to use a single translator and then mux the 1.8 V signals. (And only the CS and MISO signals need to be disconnected).

  • we modified level sheft 3.3V side pull-up resistor (from 200R to 1K) and NOPOP 1.8V side pull-up resistor.

    L voltage is about 0.3V,but 1.8V Side signals are not appear every time, eg. MOSI, CLK. can't visit 1.8V SPI FLASH

  • Try adding a 10K pull-up to the low side. Look at the signal with an oscilloscope; if the rising edges are too slow, you need to make the pullups stronger.

    Again, it would be a better idea to use a buffered translator.