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SN74AXCH8T245: Data Rate and Operating Frequency Translation

Part Number: SN74AXCH8T245


Hi,

I've been reading through data sheets for level translators and some quantify the speed in Mbps and some use MHz.  Does Texas Instruments have a standard way of translating between the two?  I am not able to find a consistent industry-wide answer to this through Google.

For example, with a 100MHz clock, I've heard that this means a 200Mbps, 100Mbps, or 50Mbps data rate.  Which is it and also why?  There don't seem to be enough clock edges in a period to create a 200Mbps data rate from a 100MHz period.  

Best,

Brian

  • Hey Brian,

    When we take a digital device like a logic device, we're talking specifically about square waves where you'll have a rising and falling edge. With one bit at each edge, a 100MHz operating frequency would equate to a 200Mbps max data rate. This is common for most digital devices.
    For example, the data rate you see in the AXCH, 380Mbps for translation from 1.8V --> 3.3V, would equate to an operating frequency of 380/2 = 190MHz. This is per line. So each I/O can independently operate at this frequency. 

    I'm not sure where you're seeing discrepancies in how it's marked. Is this in different datasheets or general design? If you've seen different distinction between clock and data rate it may be in the protocol and timing being used internally to some specific device or between the devices being connected. That's to say, if your implementation requires a reading at every rising edge, then your 100MHz clock would certainly translate to 100Mbps.

    Thanks,
    Rami

  • Hi Rami,

    Thank you for the clarification.  I had been counting the edges as a max of 2 per period.  To me, a period is one full cycle with:

    (rising edge) HIGH (falling edge) LOW

    Can you show a diagram of what you're talking about?

    In any case, I'm seeing the speeds specified differently in the datasheets for LSF010x (specified in MHz) and the SN74AXCH8T245 (specified in Mbps).  That's why I needed clarification on the translation.  I am working with a 100MHz clock.

    Best,

    Brian

  • Hey Brian,

    I think you're understanding it properly. A period is one full cycle and two bits, a rising edge and falling edge, per cycle. 




    At 100MHz the LSF would really be pushing it on the frequency limit. The SN74AXCH8T245 would support that frequency just fine. 

    Hope this helps,
    Rami