https://e2e.ti.com/support/logic-group/logic/Products covered in this section are Gates, Little Logic, and Speciality Logic. To post a question click New Post.en-USTelligent Community 13https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691509/sn74aup3g17-max-junction-temperature/6517151Wed, 21 Oct 2026 13:07:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f2a7f942-7f80-49f3-a58b-c92e1726f376Emrys Maier150C Please see: [FAQ] What is the maximum junction temperature (TJMAX) for a device?https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691493/sn74aup2g125-max-junction-temperature/6517149Wed, 21 Oct 2026 13:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9eb043fa-96ce-470b-ae8f-d768ba583d90Emrys Maier150C Please see: [FAQ] What is the maximum junction temperature (TJMAX) for a device?https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691509/sn74aup3g17-max-junction-temperatureWed, 21 Oct 2026 11:13:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5d4b8d5b-94db-4be5-9c89-61c5ad59bb79Mario MondejarPart Number: SN74AUP3G17 Hello, We couldn't find the maximun junction temperature of the follwing part numbers in their datasheets: SN74AUP3G17RSER SN74AUP2G08RSER SN74AUP2G32RSER SN74AUP3G06RSER SN74AUP3G34RSER Could you please provide the temperature for all the devices? Thank you for your support.SN74AUP3G17https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691493/sn74aup2g125-max-junction-temperatureWed, 21 Oct 2026 10:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ad425a77-b27a-48c9-942b-1e8871904854Mario MondejarPart Number: SN74AUP2G125 Hello, What's the maximum junction temperature of the SN74AUP2G125? I couldn't find this information in the datasheet. Thank you for your support.SN74AUP2G125https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1688641/cd74hc132-cd74hc132m/6516877Wed, 21 Oct 2026 08:35:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e29afda5-a1f0-42b1-a8ce-044b0ef4ae11Yokoyama Kazuhito`thanks as for replacement, so far will get certificate with original parts from eccn_hts_project_adminshttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690411/sn74gtl2003-sn74gtl2003-waveform-oscillation-problem/6516668Wed, 21 Oct 2026 05:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f4fa7b83-f0a2-4d97-9d68-5a3189c2fe63Chance ZhanYeah, I also suspect it, because so far the oscillations all seem to be happening on the CPU side, most likely caused by reflections and ringing from overly long trace distances.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690411/sn74gtl2003-sn74gtl2003-waveform-oscillation-problem/6516666Wed, 21 Oct 2026 05:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5810f956-86ea-4251-8da5-108af923d175Joshua SalinasHello Chance What is the distance between CPLD & GTL, and GTL & CPU? Is seems the part could be experiencing transmission line reflection. Regards, Joshhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691249/txu0204-txu0204-max-voltage-spec-for-input-pin/6516654Wed, 21 Oct 2026 05:17:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b4702927-8201-4761-9b41-3185e00b9abfJoshua SalinasHello Anurag, This configuration is fine since you are not exceeding the abs max input voltage which is 6.5V Regards, Joshhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1689880/sn54ac00-sp-cfp-package-forming/6516573Wed, 21 Oct 2026 03:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:96da8de5-0ea5-435b-8b97-ab23b4913f2aSridhar RHi Chen, Thanks for your detailed answer. Could you confirm, this same standards can be applicable across all the space grade components like - LM139AQML-SP, SN54AC74-SP, etc.. Regards, Sridhar Rhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690897/sn74als09-replacement-with-a-new-device/6516395Tue, 20 Oct 2026 23:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ece9e3fb-51be-4a95-89b2-f9fa8770fd56user5163865Hi Clemens-san, Emrys-san, Thank you for your support. As we first need to inform the customer's purchasing department about potential alternatives, we would like to propose the SN74ALS09DR (in an SOIC package). I will mark this thread as resolved for now. Should any further questions arise from our engineers, we will reach out to you again. Best Regards, Hiroshihttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690937/sn74lvc1t45-specification-for-voh-is-5v-or-5-5v/6516342Tue, 20 Oct 2026 22:25:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d640d48e-41a5-4d92-a3dd-b07ac49af192Sakthivel RameshHello ttd, As Clemens stated, the datasheet indicates a 0.5-1V margin. However, there is no fixed VOH/VIH spec listed, so using VCCB at 5-5.5V should be acceptable. Thank You, Sakthivel Rameshhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691249/txu0204-txu0204-max-voltage-spec-for-input-pinTue, 20 Oct 2026 19:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:85af93dd-4ea4-4487-a7eb-8806068a0d13Anurag SinghPart Number: TXU0204 Hi, I am using the TXU0204 in my design. On the input side (Pin 8), my incoming signal is at a 5V level, but Channel B is powered at 3.3V. Could you please clarify the maximum allowable voltage on the input pins under this configuration?TXU0204Medical & healthcarehttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1680247/sn74ahc123a-sn74ahc123a-repeatedly-outputting-pulses/6516097Tue, 20 Oct 2026 17:57:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:62936301-248a-4b07-9ab0-b0e768544cfdEmrys MaierHey Nelson, I took a closer look at the schematic, redrawing it and putting together a logic diagram and I think I know what's happening now. Here's the redrawn schematic I produced: Now, if we assume the UART_TXD1 input is active and then stops in the LOW state, here's what happens: The circuit cycles correctly on the falling edge of the input UART signal, but when it is done with that pulse, the 1T input sees a rising edge from the feedback on 1Q\, which is now a valid trigger event because 1T\ is held LOW. This produces an infinite loop. To avoid this, first we need to know if the UART signal will _always_ be LOW when not in use. If it is, then we can just switch which input is used (change 1T\ and 1T, and feedback from 1Q instead of 1Q\). If it's not _always_ LOW when not in use, then we need to come up with a solution that detects the edges only, which isn't difficult, but will require additional hardware. Please let me know if you want to look into this further.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691015/sn74aup1g126-inquiry-about-operation-of-sn74aup1g126dckr-at-3-000-m-altitude/6516078Tue, 20 Oct 2026 17:36:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5aa34cd0-54da-49c8-9e80-92b574b54f0aHailong ChenYes, the SN74AUP1G126DCKR is entirely suitable for operation at an altitude of 3,000 meters (and significantly higher). Standard solid-state logic ICs in plastic surface-mount packaging are inherently robust against low atmospheric pressures. No, there are no official altitude or pressure limits specified for this commercial logic buffer. TI generally does not publish altitude/pressure characterization data for commercial logic families because pressure is not considered a stress factor for low-voltage, solid-state components. TI does not routinely perform outgassing or pressure characterization tests on standard commercial devices. Such testing is strictly reserved for Space Enhanced Products (SEP) or QML Class-V radiation-hardened devices. You can safely deploy the device in your 3,000m product application without any modifications or derating factors.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690974/sn74lvc1g08-part-marking/6516073Tue, 20 Oct 2026 17:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7ca05268-1e46-46ee-ab20-4a275882d4ddHailong ChenHello Koshi, Thank you for reaching out regarding the marking update for the SN74LVC1G08DCKR as noted in PCN 20260915000.1. Regarding your question about the "1MI" marking, PCNs are the formal notification mechanism for changes to a device, including updates to manufacturing sites (like the qualification of RFAB) and corresponding updates to device markings. When a PCN specifies a new marking, that information is intended to be accurate for devices produced under the conditions described in that notification. It is common for there to be a transition period between the issuance of a PCN and the reflection of those changes in the device datasheet. Datasheets are updated periodically, and while the PCN serves as the official record of the upcoming change, the datasheet revision may not always be synchronized with the initial PCN release date. Regarding your observation about the "CE" prefix: while many TI devices follow consistent marking conventions for a specific product family, new markings introduced via a PCN—especially those associated with a new fabrication site or die revision—may occasionally deviate from legacy patterns. The "1MI" code is the officially designated marking for the SN74LVC1G08DCKR devices manufactured under the scope of this specific PCN. If you have received parts with this marking, they are authentic TI devices manufactured in accordance with the specifications outlined in the PCN. As your production line moves forward, you can rely on the PCN as the definitive source for this specific marking change. If you require further confirmation or have specific concerns about incoming material, I recommend contacting your local TI sales representative or account manager, who can provide additional verification of the product's origin and documentation.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691012/sn74lvc1g125-ep-requisition-to-clarify-the-io-level-at-y-output-pin-of-sn74lvc1g125-ep/6516070Tue, 20 Oct 2026 17:31:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3d6330b6-9295-484c-a416-f732e6bd0d7fHailong ChenYes, this specific circuit will successfully provide an output of approximately 1.8V from pin Y. Pin 1 is pulled down to ground through R105 (10kΩ) . Since this is an active-low enable pin, the buffer is permanently active and driving the output line. Because the buffer is non-inverting and enabled with a HIGH input, pin 4 (Y) will output a logic HIGH. Since the Vcc pin (Pin 5) is tied directly to VCC_1V8 , a logic HIGH means the output will drive directly to the 1.8V rail level .https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690411/sn74gtl2003-sn74gtl2003-waveform-oscillation-problem/6516046Tue, 20 Oct 2026 17:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:415a7c4f-33f9-4e3c-9593-34b4aaba6c12Chance ZhanWhen the signal is transmitted in reverse, there's also oscillation at Test Point 1 near the CPU side. This oscillation is very obvious on the CPU side, and the oscillation mentioned in the previous reply also appeared at Test Point 1. This is a pretty urgent issue, so please give some suggestions.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690411/sn74gtl2003-sn74gtl2003-waveform-oscillation-problem/6515978Tue, 20 Oct 2026 16:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9a1ecfbb-4233-406e-b3ab-d3731c566e08Chance ZhanWe had changed the pull-up and the series resistor. But the oscillation still exist. And the topology is below. Is there a way to optimize this?https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1690897/sn74als09-replacement-with-a-new-device/6515913Tue, 20 Oct 2026 15:25:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5bcde761-cc0f-4a5f-bb64-5c48e338726aEmrys MaierHello Hiroshi-san, I expect Clemens's advice is good. I just wanted to mention that I would not recommend using any PDIP packages in new designs. The PDIP package is an older design that incurs high cost and poor performance when compared with modern packaging options and most companies are moving away from it for those reasons. I would suggest taking the opportunity to modernize your system and update the board to use newer CMOS technology and a more popular package such as TSSOP or even a QFN option. We are happy to help with the update if you can share details on what you need.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1691012/sn74lvc1g125-ep-requisition-to-clarify-the-io-level-at-y-output-pin-of-sn74lvc1g125-ep/6515627Tue, 20 Oct 2026 10:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8c8752bc-0954-4c01-b448-15d5223a4675Dinesh Bala SuryaHi Clemens, Thank you for your response. Could you please verify whether the below circuit works and provide 1.8V from pin Y? Awaiting for your confirmation. Regards, Dinesh Bala Surya