https://e2e.ti.com/support/logic-group/logic/Products covered in this section are Gates, Little Logic, and Speciality Logic. To post a question click New Post.en-USTelligent Community 13https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685175/lsf0102-input-high-and-low-voltage-levels/6495934Mon, 28 Sep 2026 14:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a425da1f-5462-4964-9925-d5aecf00245bJason TrinhHi Prince, The output will most closely be 1.2V, as the FET will be on and there will be a low resistance path (R_DS_ON) between the input and output. Regards, Jasonhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685566/sn74hct08-request-for-hbm-and-cdm-esd-ratingsMon, 28 Sep 2026 11:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d0003cf5-dba6-4245-9fe8-a07246e3fc29Natalia Alejandra Santacruz TapiaPart Number: SN74HCT08 Could you please provide the HBM and CDM ESD ratings for the following MPN. SN74HCT08PWRSN74HCT08https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685175/lsf0102-input-high-and-low-voltage-levels/6495679Mon, 28 Sep 2026 10:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e8dd498b-39b1-4027-947f-78c07b94ba46PRINCE GOLACan you please check attached circuit.. In this Vref_A is 1.8V and Vref_B is 3.3V. If input is 1.2V then output will be 0V or 1.2V or 3.3V.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685521/sn74lvc1g373-d-type-latch-design-reviewMon, 28 Sep 2026 09:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9c3f37c4-a372-4a2c-b859-eb2b3f18d3dcpragash sangaran78Part Number: SN74LVC1G373 Can you review my D-Type Latch design in PM? I can PM the design and explanation so the expert can check whether it will work accordingly.Portable ElectronicsSN74LVC1G373https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1683368/sn74hc165-q1-inquiry-regarding-surge-withstand-voltage-specifications-for-sn74hc165-q1/6495623Mon, 28 Sep 2026 08:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bec407bb-dc75-47dd-8645-9963a11aa56cLee Tae HoonThank you for the clarification. Just to confirm my understanding: if I am supplying a Vcc of 5V, the allowable voltage range for the pins without the current-limiting resistor would be -0.5V to +5.5V, correct?https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685461/sn74lvc1g123-sn74lvc1g123-r-c-tw/6495532Mon, 28 Sep 2026 07:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f8831abb-4821-4182-8b93-117c2dd8837cClemens LadischPlease read the application note . 1. When C is too small, the capacitances of the board, traces, and chip dominate. When the leakage current of the capacitor is too large, the charging time becomes inaccurate; w hen the leakage current is larger than the current through the resistor, the trigger threshold will never be reached. The current through the resistor must be large enough so that the leakage current of the measurement pin (0.25 µA max.) is insignificant. 2. t w = R × C 3. You need large R and C values; large electrolytic capacitors leak too much, so you need a film capacitor. The TPUL1G113 has a smaller leakage current and is better suited for long delays. But note that even this device is not specified for delays longer than 860 ms; consider the TPUL1G513, which uses a digital oscillator.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1683368/sn74hc165-q1-inquiry-regarding-surge-withstand-voltage-specifications-for-sn74hc165-q1/6495513Mon, 28 Sep 2026 06:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e902ed5e-6e99-409c-8949-67412e871f45Clemens LadischIt cannot withstand 7.5 V when the supply voltage is less than 7 V.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685461/sn74lvc1g123-sn74lvc1g123-r-c-twMon, 28 Sep 2026 06:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d77b80f4-f1cb-427a-8dbb-e93665db1331W MGPart Number: SN74LVC1G123 Other Parts Discussed in Thread: TPUL1G513 , TPUL1G113 Hi TI Team, We are currently using the SN74LVC1G123 and would like to clarify the following questions: Is there a recommended operating range or limitation for the external R and C values? Is there a calculation formula for determining the output pulse width (tw) based on the R and C values? Can the pulse width (tw) be extended to the range of seconds? If so, what R/C values and design considerations would you recommend?TPUL1G113TPUL1G513PC & Notebookssn74lvc1g123https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1682327/lsf0102-q1-speed-limitation-and-recommended-alternate/6495389Mon, 28 Sep 2026 04:05:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a37a60cf-18dd-48cb-9bbf-3e895e119315Brian Lin (TXP)Hi Karthik, We are looking into this and will get back to you later. Thanks Brianhttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1683368/sn74hc165-q1-inquiry-regarding-surge-withstand-voltage-specifications-for-sn74hc165-q1/6495306Mon, 28 Sep 2026 01:40:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b448596f-5dd9-427d-b20f-79e171316d1eLee Tae HoonSince Vcc is defined as -0.5V to +7V, and you mentioned 'VCC + 0.5 V and GND - 0.5 V', does this mean the maximum limit voltage it can withstand is -0.5V to +7.5V?https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685288/sn74lvc1gx04-cannot-get-sn74lvc1gx04-and-32khz-tuning-fork-to-oscillate/6495208Sun, 27 Sep 2026 01:46:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3f378a55-e915-4ab5-9980-f93c916b52c9Gerald DavisCircuit#1 and Circuit#2https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685288/sn74lvc1gx04-cannot-get-sn74lvc1gx04-and-32khz-tuning-fork-to-oscillate/6495179Sat, 26 Sep 2026 10:40:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e40a3bbe-881e-435f-a6d3-f276e5e9afabGerald DavisThanks Nikki, I actually tried this arrangement on the 2nd board. I went back now to re-arranged the series resistor to match this arrangement exactly on the 1st board and using a390K ohm resistor on both boards. However neither board is working. I can get the 2nd board to oscillate at 32KHz if I touched my tweezers to the series resistor. The 1st board does not do this however. Still looking for a solution.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1673487/lsf0101-package-spec-information-regquest/6495149Sat, 26 Sep 2026 06:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:88e047cd-3545-4385-871e-73d458b42af3Daisuke NomuraCould you answer it? It is taking over 20dayshttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685288/sn74lvc1gx04-cannot-get-sn74lvc1gx04-and-32khz-tuning-fork-to-oscillate/6495141Sat, 26 Sep 2026 02:27:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f728b99b-efd1-4a41-8f1e-d5fde3a98f34Nikki DengelHi Gerald, We recommend a different placement of the series resistor than yours. To confirm your choice, I calculate that you need a series resistor of ~400k ohm in the configuration shown in the datasheet. Below is a the recommended configuration. The recommended resistor placement is circled in yellow and your resistor placement is drawn in red. I recommend using the setup shown in the datasheet. However, if you cannot change your current configuration, try reducing the size of your resistor by a significant amount (under 1 kohm). The tweezers are likely add a little bit of capacitance that helps your circuit start and maintain resonance when it cannot sustain it on its own. Regards, Nikkihttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685190/sn74lvc1g08-q1-required-revised-data-sheet-for-sn74lvc1g08qdckrq1-part/6495137Sat, 26 Sep 2026 01:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ef7a483b-3a3e-49d5-a832-6dc4fb9c30daNikki DengelHi Keerthi, I will ensure this aspect of the datasheet gets updated. Regards, Nikkihttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685186/sn74lvc1g00-required-revised-data-sheets-for-sn74lvc1g00dbvr-sn74lvc1g08dbvrg4-sn74lvc1g08dbvr-sn74lvc1g32dbvr-sn74lvc1g08dbvr-sn74lvc1g125dbvr-and-sn74lvc1g86dbvr-par/6495136Sat, 26 Sep 2026 01:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:25e1df4d-a60d-4a5c-a256-c38acf7f0a70Nikki DengelHi Keerthi, I will make sure this part of the datasheet gets updated. The PCN change will not go into effect for some time, so devices with the new part markings will not be available immediately. Regards, Nikkihttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685118/sn54hct14-graph-of-vt--min-vs-temp/6495040Fri, 25 Sep 2026 20:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2e1e1299-b299-4cad-b093-9d343d9a3cebNikki DengelHi Keith, I can't provide that kind of data, but the device follows the datasheet specifications across the operating temperature. You'll notice that all the rows on each VCC are the same. These Vt- min are guaranteed across temperature. The 25C specifications include a TYP value, but the guaranteed minimum is unchanging. Regards, Nikkihttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1685308/lsf0102-ti-level-shifter-undershoot-risk-evaluationFri, 25 Sep 2026 18:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1b0d8849-9501-4bff-98a6-a2997d7dde67Fouzaan HashmiPart Number: LSF0102 We would like to understand whether TI has any concerns or guidance around the following part potentially experiencing undershoot/data sheet violations? P/N: LSF0102DQER The data sheet indicates that device reliability may be impacted if the 500mV threshold is exceeded. How does TI see the risk of this threshold being violated?If you could help answer the following questions, that would be great. Would a -540mV (for e.g.) undershoot be seen as a reliability concern? Can it damage the drive or the platform? Any supporting data? Is the −0.5 V I/O rating a DC absolute maximum, or does it include transient allowance? What is the actual failure mechanism at negative I/O excursion? Presumably forward biasing the ESD/substrate diode on the I/O. Please find some additional details summarized in the table below and a capture of the undershoot and out circuit.LSF0102Data center & enterprise computinghttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1684998/sn74lvc1g17-propagation-delay-on-sn74lvc1g17-vs-sn74lvc1g17-q1/6494827Fri, 25 Sep 2026 15:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bb41b63a-a6aa-4ef9-9cfd-bcf6cb839de4Kollin EwingHi Thomas, The Q1 is the automotive variant of the SN74LVC1G17. There may be a difference between the two to meet the more rigorous automotive standards, we will have to do more internal testing to determine if this is the case. Regardless, we can only guarantee the information on datasheet though so please refer to the propagation delay of whichever part you intend to use. Regards, Kollin Ewinghttps://e2e.ti.com/support/logic-group/logic/f/logic-forum/1684939/sn74hct541-request-for-hbm-cdm-esd-information-for-sn74hct541pwr/6494816Fri, 25 Sep 2026 15:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c78cc218-1e25-4040-9c81-e42721546147Kollin EwingHi Connor, I checked our internal info and found these devices are rated HBM +/-2000v and CDM +/-1000v. I will make a note to get this date sheet updated. Regards, Kollin Ewing